irqchip: mips-gic: Remove platform irq_ack/irq_eoi callbacks

There's no need for platforms to have their own GIC irq_ack/irq_eoi
callbacks.  irq_ack need only clear the GIC's edge detector on
edge-triggered interrupts and there's no need at all for irq_eoi.
Also get rid of the mask_ack callback since it's not necessary either.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7809/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index 022d83136c5af88a47535dc521972a949129d4c4..1bf7985f943540a6be63046bd939e6b485719a44 100644 (file)
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -376,7 +376,5 @@ extern void gic_bind_eic_interrupt(int irq, int set);
 extern unsigned int gic_get_timer_pending(void);
 extern void gic_get_int_mask(unsigned long *dst, const unsigned long *src);
 extern unsigned int gic_get_int(void);
-extern void gic_irq_ack(struct irq_data *d);
-extern void gic_finish_irq(struct irq_data *d);
 extern void gic_platform_init(int irqs, struct irq_chip *irq_controller);
 #endif /* _ASM_GICREGS_H */

diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
index 5c3120857987c1e5bd2731f3573fe44aa1742cc0..b60adfd2bae66fc1301d2632fd703d7079f75553 100644 (file)
--- a/arch/mips/mti-malta/malta-int.c
+++ b/arch/mips/mti-malta/malta-int.c
@@ -715,22 +715,6 @@ int malta_be_handler(struct pt_regs *regs, int is_fixup)
        return retval;
 }
 
-void gic_irq_ack(struct irq_data *d)
-{
-       int irq = (d->irq - gic_irq_base);
-
-       GIC_CLR_INTR_MASK(irq);
-
-       if (gic_irq_flags[irq] & GIC_TRIG_EDGE)
-               GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq);
-}
-
-void gic_finish_irq(struct irq_data *d)
-{
-       /* Enable interrupts. */
-       GIC_SET_INTR_MASK(d->irq - gic_irq_base);
-}
-
 void __init gic_platform_init(int irqs, struct irq_chip *irq_controller)
 {
        int i;

diff --git a/arch/mips/mti-sead3/sead3-int.c b/arch/mips/mti-sead3/sead3-int.c
index 9d5b5bd3a1d2ac22a8fa32f4751a9186ec8e0d5a..03f9865e0464f0360c42ca288fc280b80fab6aed 100644 (file)
--- a/arch/mips/mti-sead3/sead3-int.c
+++ b/arch/mips/mti-sead3/sead3-int.c
@@ -85,27 +85,6 @@ void __init arch_init_irq(void)
                        ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE);
 }
 
-void gic_irq_ack(struct irq_data *d)
-{
-       GIC_CLR_INTR_MASK(d->irq - gic_irq_base);
-}
-
-void gic_finish_irq(struct irq_data *d)
-{
-       unsigned int irq = (d->irq - gic_irq_base);
-       unsigned int i, irq_source;
-
-       /* Clear edge detectors. */
-       for (i = 0; i < gic_shared_intr_map[irq].num_shared_intr; i++) {
-               irq_source = gic_shared_intr_map[irq].intr_list[i];
-               if (gic_irq_flags[irq_source] & GIC_TRIG_EDGE)
-                       GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq_source);
-       }
-
-       /* Enable interrupts. */
-       GIC_SET_INTR_MASK(irq);
-}
-
 void __init gic_platform_init(int irqs, struct irq_chip *irq_controller)
 {
        int i;

diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 582883069ef69f1bba4256e6dd5dd65105bbebfe..76658660ea4f2ecbd823be1840ca89bc7b1620ae 100644 (file)
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -237,6 +237,13 @@ static void gic_unmask_irq(struct irq_data *d)
        GIC_SET_INTR_MASK(d->irq - gic_irq_base);
 }
 
+static void gic_ack_irq(struct irq_data *d)
+{
+       /* Clear edge detector */
+       if (gic_irq_flags[d->irq - gic_irq_base] & GIC_TRIG_EDGE)
+               GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), d->irq - gic_irq_base);
+}
+
 #ifdef CONFIG_SMP
 static DEFINE_SPINLOCK(gic_lock);
 
@@ -272,11 +279,9 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
 
 static struct irq_chip gic_irq_controller = {
        .name                   =       "MIPS GIC",
-       .irq_ack                =       gic_irq_ack,
+       .irq_ack                =       gic_ack_irq,
        .irq_mask               =       gic_mask_irq,
-       .irq_mask_ack           =       gic_mask_irq,
        .irq_unmask             =       gic_unmask_irq,
-       .irq_eoi                =       gic_finish_irq,
 #ifdef CONFIG_SMP
        .irq_set_affinity       =       gic_set_affinity,
 #endif