.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r100_gpu_is_lockup,
.asic_reset = &r100_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r100_mc_wait_for_idle,
.gart = {
.tlb_flush = &r100_pci_gart_tlb_flush,
.set_page = &r100_pci_gart_set_page,
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &r100_mc_wait_for_idle,
};
static struct radeon_asic r200_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r100_gpu_is_lockup,
.asic_reset = &r100_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r100_mc_wait_for_idle,
.gart = {
.tlb_flush = &r100_pci_gart_tlb_flush,
.set_page = &r100_pci_gart_set_page,
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &r100_mc_wait_for_idle,
};
static struct radeon_asic r300_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r300_mc_wait_for_idle,
.gart = {
.tlb_flush = &r100_pci_gart_tlb_flush,
.set_page = &r100_pci_gart_set_page,
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &r300_mc_wait_for_idle,
};
static struct radeon_asic r300_asic_pcie = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r300_mc_wait_for_idle,
.gart = {
.tlb_flush = &rv370_pcie_gart_tlb_flush,
.set_page = &rv370_pcie_gart_set_page,
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &r300_mc_wait_for_idle,
};
static struct radeon_asic r420_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r300_mc_wait_for_idle,
.gart = {
.tlb_flush = &rv370_pcie_gart_tlb_flush,
.set_page = &rv370_pcie_gart_set_page,
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &r300_mc_wait_for_idle,
};
static struct radeon_asic rs400_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &r300_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &rs400_mc_wait_for_idle,
.gart = {
.tlb_flush = &rs400_gart_tlb_flush,
.set_page = &rs400_gart_set_page,
.sense = &r100_hpd_sense,
.set_polarity = &r100_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &r100_pm_misc,
.prepare = &r100_pm_prepare,
.page_flip = &r100_page_flip,
.post_page_flip = &r100_post_page_flip,
},
- .mc_wait_for_idle = &rs400_mc_wait_for_idle,
};
static struct radeon_asic rs600_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &rs600_mc_wait_for_idle,
.gart = {
.tlb_flush = &rs600_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
.sense = &rs600_hpd_sense,
.set_polarity = &rs600_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &rs600_pm_misc,
.prepare = &rs600_pm_prepare,
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &rs600_mc_wait_for_idle,
};
static struct radeon_asic rs690_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &rs690_mc_wait_for_idle,
.gart = {
.tlb_flush = &rs400_gart_tlb_flush,
.set_page = &rs400_gart_set_page,
.sense = &rs600_hpd_sense,
.set_polarity = &rs600_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &rs600_pm_misc,
.prepare = &rs600_pm_prepare,
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &rs690_mc_wait_for_idle,
};
static struct radeon_asic rv515_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &rv515_mc_wait_for_idle,
.gart = {
.tlb_flush = &rv370_pcie_gart_tlb_flush,
.set_page = &rv370_pcie_gart_set_page,
.sense = &rs600_hpd_sense,
.set_polarity = &rs600_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &rs600_pm_misc,
.prepare = &rs600_pm_prepare,
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &rv515_mc_wait_for_idle,
};
static struct radeon_asic r520_asic = {
.vga_set_state = &r100_vga_set_state,
.gpu_is_lockup = &r300_gpu_is_lockup,
.asic_reset = &rs600_asic_reset,
+ .ioctl_wait_idle = NULL,
+ .gui_idle = &r100_gui_idle,
+ .mc_wait_for_idle = &r520_mc_wait_for_idle,
.gart = {
.tlb_flush = &rv370_pcie_gart_tlb_flush,
.set_page = &rv370_pcie_gart_set_page,
.sense = &rs600_hpd_sense,
.set_polarity = &rs600_hpd_set_polarity,
},
- .ioctl_wait_idle = NULL,
- .gui_idle = &r100_gui_idle,
.pm = {
.misc = &rs600_pm_misc,
.prepare = &rs600_pm_prepare,
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &r520_mc_wait_for_idle,
};
static struct radeon_asic r600_asic = {
.vga_set_state = &r600_vga_set_state,
.gpu_is_lockup = &r600_gpu_is_lockup,
.asic_reset = &r600_asic_reset,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &r600_mc_wait_for_idle,
.gart = {
.tlb_flush = &r600_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
.sense = &r600_hpd_sense,
.set_polarity = &r600_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &r600_pm_misc,
.prepare = &rs600_pm_prepare,
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &r600_mc_wait_for_idle,
};
static struct radeon_asic rs780_asic = {
.gpu_is_lockup = &r600_gpu_is_lockup,
.vga_set_state = &r600_vga_set_state,
.asic_reset = &r600_asic_reset,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &r600_mc_wait_for_idle,
.gart = {
.tlb_flush = &r600_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
.sense = &r600_hpd_sense,
.set_polarity = &r600_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &r600_pm_misc,
.prepare = &rs600_pm_prepare,
.page_flip = &rs600_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &r600_mc_wait_for_idle,
};
static struct radeon_asic rv770_asic = {
.asic_reset = &r600_asic_reset,
.gpu_is_lockup = &r600_gpu_is_lockup,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &r600_mc_wait_for_idle,
.gart = {
.tlb_flush = &r600_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
.sense = &r600_hpd_sense,
.set_polarity = &r600_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &rv770_pm_misc,
.prepare = &rs600_pm_prepare,
.page_flip = &rv770_page_flip,
.post_page_flip = &rs600_post_page_flip,
},
- .mc_wait_for_idle = &r600_mc_wait_for_idle,
};
static struct radeon_asic evergreen_asic = {
.gpu_is_lockup = &evergreen_gpu_is_lockup,
.asic_reset = &evergreen_asic_reset,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.gart = {
.tlb_flush = &evergreen_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
.sense = &evergreen_hpd_sense,
.set_polarity = &evergreen_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &evergreen_pm_misc,
.prepare = &evergreen_pm_prepare,
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
static struct radeon_asic sumo_asic = {
.gpu_is_lockup = &evergreen_gpu_is_lockup,
.asic_reset = &evergreen_asic_reset,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.gart = {
.tlb_flush = &evergreen_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
.sense = &evergreen_hpd_sense,
.set_polarity = &evergreen_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &evergreen_pm_misc,
.prepare = &evergreen_pm_prepare,
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
static struct radeon_asic btc_asic = {
.gpu_is_lockup = &evergreen_gpu_is_lockup,
.asic_reset = &evergreen_asic_reset,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.gart = {
.tlb_flush = &evergreen_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
.sense = &evergreen_hpd_sense,
.set_polarity = &evergreen_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &evergreen_pm_misc,
.prepare = &evergreen_pm_prepare,
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
static const struct radeon_vm_funcs cayman_vm_funcs = {
.gpu_is_lockup = &cayman_gpu_is_lockup,
.asic_reset = &cayman_asic_reset,
.vga_set_state = &r600_vga_set_state,
+ .ioctl_wait_idle = r600_ioctl_wait_idle,
+ .gui_idle = &r600_gui_idle,
+ .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
.gart = {
.tlb_flush = &cayman_pcie_gart_tlb_flush,
.set_page = &rs600_gart_set_page,
.sense = &evergreen_hpd_sense,
.set_polarity = &evergreen_hpd_set_polarity,
},
- .ioctl_wait_idle = r600_ioctl_wait_idle,
- .gui_idle = &r600_gui_idle,
.pm = {
.misc = &evergreen_pm_misc,
.prepare = &evergreen_pm_prepare,
.page_flip = &evergreen_page_flip,
.post_page_flip = &evergreen_post_page_flip,
},
- .mc_wait_for_idle = &evergreen_mc_wait_for_idle,
};
int radeon_asic_init(struct radeon_device *rdev)