powerpc: Create pci_controller_ops.window_alignment and shim
authorDaniel Axtens <dja@axtens.net>
Tue, 31 Mar 2015 05:00:46 +0000 (16:00 +1100)
committerMichael Ellerman <mpe@ellerman.id.au>
Sat, 11 Apr 2015 10:49:13 +0000 (20:49 +1000)
Add pci_controller_ops.window_alignment,
shadowing ppc_md.pcibios_window_alignment.
Add a shim, and changes the callsites to use the shim.

Here, we use pci_window_alignment, as pcibios_window_alignment is
already taken.

Signed-off-by: Daniel Axtens <dja@axtens.net>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/pci-bridge.h
arch/powerpc/kernel/pci-common.c

index 9d02ea6255ffe705a4ecfebf783b2d2b18650bef..ed4f8ce803bb8c19ca032886233adc51e866da84 100644 (file)
@@ -31,6 +31,9 @@ struct pci_controller_ops {
        /* Called when pci_enable_device() is called. Returns true to
         * allow assignment/enabling of the device. */
        bool            (*enable_device_hook)(struct pci_dev *);
+
+       /* Called during PCI resource reassignment */
+       resource_size_t (*window_alignment)(struct pci_bus *, unsigned long type);
 };
 
 /*
@@ -325,5 +328,23 @@ static inline bool pcibios_enable_device_hook(struct pci_dev *dev)
        return true;
 }
 
+static inline resource_size_t pci_window_alignment(struct pci_bus *bus,
+                                                  unsigned long type)
+{
+       struct pci_controller *phb = pci_bus_to_host(bus);
+
+       if (phb->controller_ops.window_alignment)
+               return phb->controller_ops.window_alignment(bus, type);
+       if (ppc_md.pcibios_window_alignment)
+               return ppc_md.pcibios_window_alignment(bus, type);
+
+       /*
+        * PCI core will figure out the default
+        * alignment: 4KiB for I/O and 1MiB for
+        * memory window.
+        */
+       return 1;
+}
+
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_PCI_BRIDGE_H */
index 8639e9cd65d5b39226a24ecfbc86ab025138b455..698e0328d9c31f844c5005fd923df105ac7fa7bf 100644 (file)
@@ -109,15 +109,7 @@ void pcibios_free_controller(struct pci_controller *phb)
 resource_size_t pcibios_window_alignment(struct pci_bus *bus,
                                         unsigned long type)
 {
-       if (ppc_md.pcibios_window_alignment)
-               return ppc_md.pcibios_window_alignment(bus, type);
-
-       /*
-        * PCI core will figure out the default
-        * alignment: 4KiB for I/O and 1MiB for
-        * memory window.
-        */
-       return 1;
+       return pci_window_alignment(bus, type);
 }
 
 void pcibios_reset_secondary_bus(struct pci_dev *dev)