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ARM: dts: socfpga: Fix SDRAM node address for Arria10
authorThor Thayer <thor.thayer@linux.intel.com>
Tue, 25 Sep 2018 15:21:10 +0000 (10:21 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 13 Nov 2018 19:15:12 +0000 (11:15 -0800)
commit ce3bf934f919a7d675c5b7fa4cc233ded9c6256e upstream.

The address in the SDRAM node was incorrect. Fix this to agree with the
correct address and to match the reg definition block.

Cc: stable@vger.kernel.org
Fixes: 54b4a8f57848b("arm: socfpga: dts: Add Arria10 SDRAM EDAC DTS support")
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm/boot/dts/socfpga_arria10.dtsi patch | blob | blame | history

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 791ca15c799eba98850cbc3d4b96be7a509c422f..bd1985694bcae14bce4b5228b8bd40cbbea98e36 100644 (file)
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -601,7 +601,7 @@
                        status = "disabled";
                };
 
-               sdr: sdr@ffc25000 {
+               sdr: sdr@ffcfb100 {
                        compatible = "altr,sdr-ctl", "syscon";
                        reg = <0xffcfb100 0x80>;
                };