EDAC, AMD: decode FR MCEs

See Fam10h BKDG (31116, rev. 3.28), Table 101.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>

diff --git a/drivers/edac/edac_mce_amd.c b/drivers/edac/edac_mce_amd.c
index 22848285536218811830fa7ee1d23b48c50faaf1..c8ca7136daccb1edf6d43967d95439942c4488da 100644 (file)
--- a/drivers/edac/edac_mce_amd.c
+++ b/drivers/edac/edac_mce_amd.c
@@ -321,6 +321,15 @@ void amd_decode_nb_mce(int node_id, struct err_regs *regs, int handle_errors)
 }
 EXPORT_SYMBOL_GPL(amd_decode_nb_mce);
 
+static void amd_decode_fr_mce(u64 mc5_status)
+{
+       /* we have only one error signature so match all fields at once. */
+       if ((mc5_status & 0xffff) == 0x0f0f)
+               pr_emerg(" FR Error: CPU Watchdog timer expire.\n");
+       else
+               pr_warning("Corrupted FR MCE info?\n");
+}
+
 static inline void amd_decode_err_code(unsigned int ec)
 {
        if (TLB_ERROR(ec)) {
@@ -401,6 +410,10 @@ void decode_mce(struct mce *m)
                amd_decode_nb_mce(node, &regs, 1);
                break;
 
+       case 5:
+               amd_decode_fr_mce(m->status);
+               break;
+
        default:
                break;
        }