clk: mmp: Remove CLK_IS_ROOT
authorStephen Boyd <sboyd@codeaurora.org>
Tue, 1 Mar 2016 18:59:52 +0000 (10:59 -0800)
committerStephen Boyd <sboyd@codeaurora.org>
Fri, 15 Apr 2016 23:50:01 +0000 (16:50 -0700)
This flag is a no-op now. Remove usage of the flag.

Cc: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/mmp/clk-mmp2.c
drivers/clk/mmp/clk-of-mmp2.c
drivers/clk/mmp/clk-of-pxa168.c
drivers/clk/mmp/clk-of-pxa1928.c
drivers/clk/mmp/clk-of-pxa910.c
drivers/clk/mmp/clk-pxa168.c
drivers/clk/mmp/clk-pxa910.c

index 38931dbd1effd7a9ce6b11360274e673add57e98..383f6a4f64f093258e60ea725197125a5e0f07fc 100644 (file)
@@ -99,23 +99,19 @@ void __init mmp2_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
                return;
        }
 
-       clk = clk_register_fixed_rate(NULL, "clk32", NULL, CLK_IS_ROOT, 3200);
+       clk = clk_register_fixed_rate(NULL, "clk32", NULL, 0, 3200);
        clk_register_clkdev(clk, "clk32", NULL);
 
-       vctcxo = clk_register_fixed_rate(NULL, "vctcxo", NULL, CLK_IS_ROOT,
-                               26000000);
+       vctcxo = clk_register_fixed_rate(NULL, "vctcxo", NULL, 0, 26000000);
        clk_register_clkdev(vctcxo, "vctcxo", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "pll1", NULL, CLK_IS_ROOT,
-                               800000000);
+       clk = clk_register_fixed_rate(NULL, "pll1", NULL, 0, 800000000);
        clk_register_clkdev(clk, "pll1", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "usb_pll", NULL, CLK_IS_ROOT,
-                               480000000);
+       clk = clk_register_fixed_rate(NULL, "usb_pll", NULL, 0, 480000000);
        clk_register_clkdev(clk, "usb_pll", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "pll2", NULL, CLK_IS_ROOT,
-                               960000000);
+       clk = clk_register_fixed_rate(NULL, "pll2", NULL, 0, 960000000);
        clk_register_clkdev(clk, "pll2", NULL);
 
        clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1",
index 251533d87c6538f6ff2cb46bee025a2589a1df2f..3a51fff1b0e76b7bbebdbc969d7f1d67fe796887 100644 (file)
@@ -63,11 +63,11 @@ struct mmp2_clk_unit {
 };
 
 static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = {
-       {MMP2_CLK_CLK32, "clk32", NULL, CLK_IS_ROOT, 32768},
-       {MMP2_CLK_VCTCXO, "vctcxo", NULL, CLK_IS_ROOT, 26000000},
-       {MMP2_CLK_PLL1, "pll1", NULL, CLK_IS_ROOT, 800000000},
-       {MMP2_CLK_PLL2, "pll2", NULL, CLK_IS_ROOT, 960000000},
-       {MMP2_CLK_USB_PLL, "usb_pll", NULL, CLK_IS_ROOT, 480000000},
+       {MMP2_CLK_CLK32, "clk32", NULL, 0, 32768},
+       {MMP2_CLK_VCTCXO, "vctcxo", NULL, 0, 26000000},
+       {MMP2_CLK_PLL1, "pll1", NULL, 0, 800000000},
+       {MMP2_CLK_PLL2, "pll2", NULL, 0, 960000000},
+       {MMP2_CLK_USB_PLL, "usb_pll", NULL, 0, 480000000},
 };
 
 static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {
index 64eaf4141c69842a766f49a79a1b2698b6974e8a..87f2317b2a005aca6aed18a39de7509010edd19e 100644 (file)
@@ -56,10 +56,10 @@ struct pxa168_clk_unit {
 };
 
 static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = {
-       {PXA168_CLK_CLK32, "clk32", NULL, CLK_IS_ROOT, 32768},
-       {PXA168_CLK_VCTCXO, "vctcxo", NULL, CLK_IS_ROOT, 26000000},
-       {PXA168_CLK_PLL1, "pll1", NULL, CLK_IS_ROOT, 624000000},
-       {PXA168_CLK_USB_PLL, "usb_pll", NULL, CLK_IS_ROOT, 480000000},
+       {PXA168_CLK_CLK32, "clk32", NULL, 0, 32768},
+       {PXA168_CLK_VCTCXO, "vctcxo", NULL, 0, 26000000},
+       {PXA168_CLK_PLL1, "pll1", NULL, 0, 624000000},
+       {PXA168_CLK_USB_PLL, "usb_pll", NULL, 0, 480000000},
 };
 
 static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {
index 433a5ae1eae0f7237ce5641f076663e57f64bd4a..e478ff44e170b4591430064fb9d4eba9592e8dbe 100644 (file)
@@ -34,12 +34,12 @@ struct pxa1928_clk_unit {
 };
 
 static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = {
-       {0, "clk32", NULL, CLK_IS_ROOT, 32768},
-       {0, "vctcxo", NULL, CLK_IS_ROOT, 26000000},
-       {0, "pll1_624", NULL, CLK_IS_ROOT, 624000000},
-       {0, "pll5p", NULL, CLK_IS_ROOT, 832000000},
-       {0, "pll5", NULL, CLK_IS_ROOT, 1248000000},
-       {0, "usb_pll", NULL, CLK_IS_ROOT, 480000000},
+       {0, "clk32", NULL, 0, 32768},
+       {0, "vctcxo", NULL, 0, 26000000},
+       {0, "pll1_624", NULL, 0, 624000000},
+       {0, "pll5p", NULL, 0, 832000000},
+       {0, "pll5", NULL, 0, 1248000000},
+       {0, "usb_pll", NULL, 0, 480000000},
 };
 
 static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {
index 13d6173326a435ad46af652f27bfc20e32302e04..e22a67f76d932546eba42aec3b69be266d775238 100644 (file)
@@ -56,10 +56,10 @@ struct pxa910_clk_unit {
 };
 
 static struct mmp_param_fixed_rate_clk fixed_rate_clks[] = {
-       {PXA910_CLK_CLK32, "clk32", NULL, CLK_IS_ROOT, 32768},
-       {PXA910_CLK_VCTCXO, "vctcxo", NULL, CLK_IS_ROOT, 26000000},
-       {PXA910_CLK_PLL1, "pll1", NULL, CLK_IS_ROOT, 624000000},
-       {PXA910_CLK_USB_PLL, "usb_pll", NULL, CLK_IS_ROOT, 480000000},
+       {PXA910_CLK_CLK32, "clk32", NULL, 0, 32768},
+       {PXA910_CLK_VCTCXO, "vctcxo", NULL, 0, 26000000},
+       {PXA910_CLK_PLL1, "pll1", NULL, 0, 624000000},
+       {PXA910_CLK_USB_PLL, "usb_pll", NULL, 0, 480000000},
 };
 
 static struct mmp_param_fixed_factor_clk fixed_factor_clks[] = {
index 0dd83fb950c9464a8ad7b20f680f0e5ef3a84e5b..a9ef9209532aa66605c1eca9de7b1f74d52ae09c 100644 (file)
@@ -92,15 +92,13 @@ void __init pxa168_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
                return;
        }
 
-       clk = clk_register_fixed_rate(NULL, "clk32", NULL, CLK_IS_ROOT, 3200);
+       clk = clk_register_fixed_rate(NULL, "clk32", NULL, 0, 3200);
        clk_register_clkdev(clk, "clk32", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, CLK_IS_ROOT,
-                               26000000);
+       clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, 0, 26000000);
        clk_register_clkdev(clk, "vctcxo", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "pll1", NULL, CLK_IS_ROOT,
-                               624000000);
+       clk = clk_register_fixed_rate(NULL, "pll1", NULL, 0, 624000000);
        clk_register_clkdev(clk, "pll1", NULL);
 
        clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1",
index e1d2ce22cdf11a704da261ca6e397db139c52368..a520cf7702a11649fe14581a59cdb063c859b461 100644 (file)
@@ -97,15 +97,13 @@ void __init pxa910_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
                return;
        }
 
-       clk = clk_register_fixed_rate(NULL, "clk32", NULL, CLK_IS_ROOT, 3200);
+       clk = clk_register_fixed_rate(NULL, "clk32", NULL, 0, 3200);
        clk_register_clkdev(clk, "clk32", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, CLK_IS_ROOT,
-                               26000000);
+       clk = clk_register_fixed_rate(NULL, "vctcxo", NULL, 0, 26000000);
        clk_register_clkdev(clk, "vctcxo", NULL);
 
-       clk = clk_register_fixed_rate(NULL, "pll1", NULL, CLK_IS_ROOT,
-                               624000000);
+       clk = clk_register_fixed_rate(NULL, "pll1", NULL, 0, 624000000);
        clk_register_clkdev(clk, "pll1", NULL);
 
        clk = clk_register_fixed_factor(NULL, "pll1_2", "pll1",