gpio/s3c24xx: move gpio driver into drivers/gpio/
authorKukjin Kim <kgene.kim@samsung.com>
Fri, 26 Aug 2011 02:03:03 +0000 (11:03 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Wed, 21 Sep 2011 01:52:22 +0000 (10:52 +0900)
Cc: Ben Dooks <ben-linux@fluff.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-s3c2410/Kconfig
arch/arm/mach-s3c2410/Makefile
arch/arm/mach-s3c2412/Kconfig
arch/arm/mach-s3c2412/Makefile
arch/arm/mach-s3c2440/Kconfig
arch/arm/plat-s3c24xx/Makefile
arch/arm/plat-s3c24xx/gpio.c [deleted file]
arch/arm/plat-s3c24xx/gpiolib.c [deleted file]
drivers/gpio/Kconfig
drivers/gpio/Makefile
drivers/gpio/gpio-s3c24xx.c [new file with mode: 0644]

index 7245a55795dc70b004f24eca918d7d52b4fa0e19..3700cf32af0f4c95b0c7711b08d6768330ef1af0 100644 (file)
@@ -8,7 +8,6 @@ config CPU_S3C2410
        select CPU_ARM920T
        select S3C_GPIO_PULL_UP
        select S3C2410_CLOCK
-       select S3C2410_GPIO
        select CPU_LLSERIAL_S3C2410
        select S3C2410_PM if PM
        select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX
@@ -28,11 +27,6 @@ config S3C2410_PM
        help
          Power Management code common to S3C2410 and better
 
-config S3C2410_GPIO
-       bool
-       help
-         GPIO code for S3C2410 and similar processors
-
 config SIMTEC_NOR
        bool
        help
index 81695353d8f497d52d848a3637ac2b133003e841..782fd81144e99591096b80fab4b662ef3a8df02b 100644 (file)
@@ -13,7 +13,6 @@ obj-$(CONFIG_CPU_S3C2410)     += s3c2410.o
 obj-$(CONFIG_CPU_S3C2410_DMA)  += dma.o
 obj-$(CONFIG_CPU_S3C2410_DMA)  += dma.o
 obj-$(CONFIG_S3C2410_PM)       += pm.o sleep.o
-obj-$(CONFIG_S3C2410_GPIO)     += gpio.o
 obj-$(CONFIG_S3C2410_CPUFREQ)  += cpu-freq.o
 obj-$(CONFIG_S3C2410_PLLTABLE) += pll.o
 
index c2cf4e56998990cf0041535067d897589d344ac2..b8b9029e9f2d7d7a0446bb869948a7590e65d2ac 100644 (file)
@@ -9,7 +9,6 @@ config CPU_S3C2412
        select CPU_LLSERIAL_S3C2440
        select S3C2412_PM if PM
        select S3C2412_DMA if S3C2410_DMA
-       select S3C2410_GPIO
        help
          Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
 
index 6c48a91ea39e75a00e29b88a968553fc1e796fbb..7e4d95fa8a97f0d2668f4a6146ddcb8d8b4f548d 100644 (file)
@@ -12,7 +12,6 @@ obj-                          :=
 obj-$(CONFIG_CPU_S3C2412)      += s3c2412.o
 obj-$(CONFIG_CPU_S3C2412)      += irq.o
 obj-$(CONFIG_CPU_S3C2412)      += clock.o
-obj-$(CONFIG_CPU_S3C2412)      += gpio.o
 obj-$(CONFIG_S3C2412_DMA)      += dma.o
 obj-$(CONFIG_S3C2412_PM)       += pm.o
 obj-$(CONFIG_S3C2412_PM_SLEEP) += sleep.o
index 50825a3f91cced3988a3e01e02f5f334215765bd..c461fb8e15c02db73448dbfabbb25c4cb46661f5 100644 (file)
@@ -8,7 +8,6 @@ config CPU_S3C2440
        select S3C_GPIO_PULL_UP
        select S3C2410_CLOCK
        select S3C2410_PM if PM
-       select S3C2410_GPIO
        select S3C2440_DMA if S3C2410_DMA
        select CPU_S3C244X
        select CPU_LLSERIAL_S3C2440
@@ -20,7 +19,6 @@ config CPU_S3C2442
        select CPU_ARM920T
        select S3C_GPIO_PULL_DOWN
        select S3C2410_CLOCK
-       select S3C2410_GPIO
        select S3C2410_PM if PM
        select CPU_S3C244X
        select CPU_LLSERIAL_S3C2440
index 0291bd6e236e832003986d6559eda8699740aba4..e4f46495ed308e707c9a3f274ffb6ea58bbc5a9c 100644 (file)
@@ -15,8 +15,6 @@ obj-                          :=
 obj-y                          += cpu.o
 obj-y                          += irq.o
 obj-y                          += devs.o
-obj-y                          += gpio.o
-obj-y                          += gpiolib.o
 obj-y                          += clock.o
 obj-$(CONFIG_S3C24XX_DCLK)     += clock-dclk.o
 
diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c
deleted file mode 100644 (file)
index 2f3d7c0..0000000
+++ /dev/null
@@ -1,96 +0,0 @@
-/* linux/arch/arm/plat-s3c24xx/gpio.c
- *
- * Copyright (c) 2004-2010 Simtec Electronics
- *     Ben Dooks <ben@simtec.co.uk>
- *
- * S3C24XX GPIO support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/gpio.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/gpio-fns.h>
-#include <asm/irq.h>
-
-#include <mach/regs-gpio.h>
-
-#include <plat/gpio-core.h>
-
-/* gpiolib wrappers until these are totally eliminated */
-
-void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
-{
-       int ret;
-
-       WARN_ON(to);    /* should be none of these left */
-
-       if (!to) {
-               /* if pull is enabled, try first with up, and if that
-                * fails, try using down */
-
-               ret = s3c_gpio_setpull(pin, S3C_GPIO_PULL_UP);
-               if (ret)
-                       s3c_gpio_setpull(pin, S3C_GPIO_PULL_DOWN);
-       } else {
-               s3c_gpio_setpull(pin, S3C_GPIO_PULL_NONE);
-       }
-}
-EXPORT_SYMBOL(s3c2410_gpio_pullup);
-
-void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
-{
-       /* do this via gpiolib until all users removed */
-
-       gpio_request(pin, "temporary");
-       gpio_set_value(pin, to);
-       gpio_free(pin);
-}
-
-EXPORT_SYMBOL(s3c2410_gpio_setpin);
-
-unsigned int s3c2410_gpio_getpin(unsigned int pin)
-{
-       struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
-       unsigned long offs = pin - chip->chip.base;
-
-       return __raw_readl(chip->base + 0x04) & (1<< offs);
-}
-
-EXPORT_SYMBOL(s3c2410_gpio_getpin);
-
-unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change)
-{
-       unsigned long flags;
-       unsigned long misccr;
-
-       local_irq_save(flags);
-       misccr = __raw_readl(S3C24XX_MISCCR);
-       misccr &= ~clear;
-       misccr ^= change;
-       __raw_writel(misccr, S3C24XX_MISCCR);
-       local_irq_restore(flags);
-
-       return misccr;
-}
-
-EXPORT_SYMBOL(s3c2410_modify_misccr);
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
deleted file mode 100644 (file)
index 243b641..0000000
+++ /dev/null
@@ -1,229 +0,0 @@
-/* linux/arch/arm/plat-s3c24xx/gpiolib.c
- *
- * Copyright (c) 2008-2010 Simtec Electronics
- *     http://armlinux.simtec.co.uk/
- *     Ben Dooks <ben@simtec.co.uk>
- *
- * S3C24XX GPIOlib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/sysdev.h>
-#include <linux/ioport.h>
-#include <linux/io.h>
-#include <linux/gpio.h>
-
-#include <plat/gpio-core.h>
-#include <plat/gpio-cfg.h>
-#include <plat/gpio-cfg-helpers.h>
-#include <mach/hardware.h>
-#include <asm/irq.h>
-#include <plat/pm.h>
-
-#include <mach/regs-gpio.h>
-
-static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
-{
-       return -EINVAL;
-}
-
-static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
-                                       unsigned offset, int value)
-{
-       struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
-       void __iomem *base = ourchip->base;
-       unsigned long flags;
-       unsigned long dat;
-       unsigned long con;
-
-       local_irq_save(flags);
-
-       con = __raw_readl(base + 0x00);
-       dat = __raw_readl(base + 0x04);
-
-       dat &= ~(1 << offset);
-       if (value)
-               dat |= 1 << offset;
-
-       __raw_writel(dat, base + 0x04);
-
-       con &= ~(1 << offset);
-
-       __raw_writel(con, base + 0x00);
-       __raw_writel(dat, base + 0x04);
-
-       local_irq_restore(flags);
-       return 0;
-}
-
-static int s3c24xx_gpiolib_bankf_toirq(struct gpio_chip *chip, unsigned offset)
-{
-       if (offset < 4)
-               return IRQ_EINT0 + offset;
-       
-       if (offset < 8)
-               return IRQ_EINT4 + offset - 4;
-       
-       return -EINVAL;
-}
-
-static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
-       .set_config     = s3c_gpio_setcfg_s3c24xx_a,
-       .get_config     = s3c_gpio_getcfg_s3c24xx_a,
-};
-
-struct s3c_gpio_cfg s3c24xx_gpiocfg_default = {
-       .set_config     = s3c_gpio_setcfg_s3c24xx,
-       .get_config     = s3c_gpio_getcfg_s3c24xx,
-};
-
-struct s3c_gpio_chip s3c24xx_gpios[] = {
-       [0] = {
-               .base   = S3C2410_GPACON,
-               .pm     = __gpio_pm(&s3c_gpio_pm_1bit),
-               .config = &s3c24xx_gpiocfg_banka,
-               .chip   = {
-                       .base                   = S3C2410_GPA(0),
-                       .owner                  = THIS_MODULE,
-                       .label                  = "GPIOA",
-                       .ngpio                  = 24,
-                       .direction_input        = s3c24xx_gpiolib_banka_input,
-                       .direction_output       = s3c24xx_gpiolib_banka_output,
-               },
-       },
-       [1] = {
-               .base   = S3C2410_GPBCON,
-               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
-               .chip   = {
-                       .base                   = S3C2410_GPB(0),
-                       .owner                  = THIS_MODULE,
-                       .label                  = "GPIOB",
-                       .ngpio                  = 16,
-               },
-       },
-       [2] = {
-               .base   = S3C2410_GPCCON,
-               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
-               .chip   = {
-                       .base                   = S3C2410_GPC(0),
-                       .owner                  = THIS_MODULE,
-                       .label                  = "GPIOC",
-                       .ngpio                  = 16,
-               },
-       },
-       [3] = {
-               .base   = S3C2410_GPDCON,
-               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
-               .chip   = {
-                       .base                   = S3C2410_GPD(0),
-                       .owner                  = THIS_MODULE,
-                       .label                  = "GPIOD",
-                       .ngpio                  = 16,
-               },
-       },
-       [4] = {
-               .base   = S3C2410_GPECON,
-               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
-               .chip   = {
-                       .base                   = S3C2410_GPE(0),
-                       .label                  = "GPIOE",
-                       .owner                  = THIS_MODULE,
-                       .ngpio                  = 16,
-               },
-       },
-       [5] = {
-               .base   = S3C2410_GPFCON,
-               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
-               .chip   = {
-                       .base                   = S3C2410_GPF(0),
-                       .owner                  = THIS_MODULE,
-                       .label                  = "GPIOF",
-                       .ngpio                  = 8,
-                       .to_irq                 = s3c24xx_gpiolib_bankf_toirq,
-               },
-       },
-       [6] = {
-               .base   = S3C2410_GPGCON,
-               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
-               .irq_base = IRQ_EINT8,
-               .chip   = {
-                       .base                   = S3C2410_GPG(0),
-                       .owner                  = THIS_MODULE,
-                       .label                  = "GPIOG",
-                       .ngpio                  = 16,
-                       .to_irq                 = samsung_gpiolib_to_irq,
-               },
-       }, {
-               .base   = S3C2410_GPHCON,
-               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
-               .chip   = {
-                       .base                   = S3C2410_GPH(0),
-                       .owner                  = THIS_MODULE,
-                       .label                  = "GPIOH",
-                       .ngpio                  = 11,
-               },
-       },
-               /* GPIOS for the S3C2443 and later devices. */
-       {
-               .base   = S3C2440_GPJCON,
-               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
-               .chip   = {
-                       .base                   = S3C2410_GPJ(0),
-                       .owner                  = THIS_MODULE,
-                       .label                  = "GPIOJ",
-                       .ngpio                  = 16,
-               },
-       }, {
-               .base   = S3C2443_GPKCON,
-               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
-               .chip   = {
-                       .base                   = S3C2410_GPK(0),
-                       .owner                  = THIS_MODULE,
-                       .label                  = "GPIOK",
-                       .ngpio                  = 16,
-               },
-       }, {
-               .base   = S3C2443_GPLCON,
-               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
-               .chip   = {
-                       .base                   = S3C2410_GPL(0),
-                       .owner                  = THIS_MODULE,
-                       .label                  = "GPIOL",
-                       .ngpio                  = 15,
-               },
-       }, {
-               .base   = S3C2443_GPMCON,
-               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
-               .chip   = {
-                       .base                   = S3C2410_GPM(0),
-                       .owner                  = THIS_MODULE,
-                       .label                  = "GPIOM",
-                       .ngpio                  = 2,
-               },
-       },
-};
-
-
-static __init int s3c24xx_gpiolib_init(void)
-{
-       struct s3c_gpio_chip *chip = s3c24xx_gpios;
-       int gpn;
-
-       for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++) {
-               if (!chip->config)
-                       chip->config = &s3c24xx_gpiocfg_default;
-
-               s3c_gpiolib_add(chip);
-       }
-
-       return 0;
-}
-
-core_initcall(s3c24xx_gpiolib_init);
index d539efd96d4b8d5b7c032c5c0767543da7413cd7..5654e1b082af0e42bd932534ed1077a215a5a5e0 100644 (file)
@@ -135,6 +135,10 @@ config GPIO_PLAT_SAMSUNG
        def_bool y
        depends on SAMSUNG_GPIOLIB_4BIT
 
+config GPIO_S3C24XX
+       def_bool y
+       depends on PLAT_S3C24XX
+
 config GPIO_S5PC100
        def_bool y
        depends on CPU_S5PC100
index 9588948c96f08b2e8487b6333d7151fd1e914267..c7f1c00986c9f9feb845cd8ce27c26d04955b514 100644 (file)
@@ -40,6 +40,7 @@ obj-$(CONFIG_GPIO_PL061)      += gpio-pl061.o
 obj-$(CONFIG_GPIO_RDC321X)     += gpio-rdc321x.o
 
 obj-$(CONFIG_GPIO_PLAT_SAMSUNG)        += gpio-plat-samsung.o
+obj-$(CONFIG_GPIO_S3C24XX)     += gpio-s3c24xx.o
 obj-$(CONFIG_GPIO_S5PC100)     += gpio-s5pc100.o
 obj-$(CONFIG_GPIO_S5PV210)     += gpio-s5pv210.o
 
diff --git a/drivers/gpio/gpio-s3c24xx.c b/drivers/gpio/gpio-s3c24xx.c
new file mode 100644 (file)
index 0000000..ff61031
--- /dev/null
@@ -0,0 +1,283 @@
+/*
+ * Copyright (c) 2008-2010 Simtec Electronics
+ *     http://armlinux.simtec.co.uk/
+ *     Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24XX GPIOlib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+*/
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/sysdev.h>
+#include <linux/ioport.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <asm/irq.h>
+
+#include <mach/hardware.h>
+#include <mach/gpio-fns.h>
+#include <mach/regs-gpio.h>
+
+#include <plat/gpio-core.h>
+#include <plat/gpio-cfg.h>
+#include <plat/gpio-cfg-helpers.h>
+#include <plat/pm.h>
+
+static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
+{
+       return -EINVAL;
+}
+
+static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
+                                       unsigned offset, int value)
+{
+       struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
+       void __iomem *base = ourchip->base;
+       unsigned long flags;
+       unsigned long dat;
+       unsigned long con;
+
+       local_irq_save(flags);
+
+       con = __raw_readl(base + 0x00);
+       dat = __raw_readl(base + 0x04);
+
+       dat &= ~(1 << offset);
+       if (value)
+               dat |= 1 << offset;
+
+       __raw_writel(dat, base + 0x04);
+
+       con &= ~(1 << offset);
+
+       __raw_writel(con, base + 0x00);
+       __raw_writel(dat, base + 0x04);
+
+       local_irq_restore(flags);
+       return 0;
+}
+
+static int s3c24xx_gpiolib_bankf_toirq(struct gpio_chip *chip, unsigned offset)
+{
+       if (offset < 4)
+               return IRQ_EINT0 + offset;
+       
+       if (offset < 8)
+               return IRQ_EINT4 + offset - 4;
+       
+       return -EINVAL;
+}
+
+static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
+       .set_config     = s3c_gpio_setcfg_s3c24xx_a,
+       .get_config     = s3c_gpio_getcfg_s3c24xx_a,
+};
+
+struct s3c_gpio_cfg s3c24xx_gpiocfg_default = {
+       .set_config     = s3c_gpio_setcfg_s3c24xx,
+       .get_config     = s3c_gpio_getcfg_s3c24xx,
+};
+
+struct s3c_gpio_chip s3c24xx_gpios[] = {
+       [0] = {
+               .base   = S3C2410_GPACON,
+               .pm     = __gpio_pm(&s3c_gpio_pm_1bit),
+               .config = &s3c24xx_gpiocfg_banka,
+               .chip   = {
+                       .base                   = S3C2410_GPA(0),
+                       .owner                  = THIS_MODULE,
+                       .label                  = "GPIOA",
+                       .ngpio                  = 24,
+                       .direction_input        = s3c24xx_gpiolib_banka_input,
+                       .direction_output       = s3c24xx_gpiolib_banka_output,
+               },
+       },
+       [1] = {
+               .base   = S3C2410_GPBCON,
+               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
+               .chip   = {
+                       .base                   = S3C2410_GPB(0),
+                       .owner                  = THIS_MODULE,
+                       .label                  = "GPIOB",
+                       .ngpio                  = 16,
+               },
+       },
+       [2] = {
+               .base   = S3C2410_GPCCON,
+               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
+               .chip   = {
+                       .base                   = S3C2410_GPC(0),
+                       .owner                  = THIS_MODULE,
+                       .label                  = "GPIOC",
+                       .ngpio                  = 16,
+               },
+       },
+       [3] = {
+               .base   = S3C2410_GPDCON,
+               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
+               .chip   = {
+                       .base                   = S3C2410_GPD(0),
+                       .owner                  = THIS_MODULE,
+                       .label                  = "GPIOD",
+                       .ngpio                  = 16,
+               },
+       },
+       [4] = {
+               .base   = S3C2410_GPECON,
+               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
+               .chip   = {
+                       .base                   = S3C2410_GPE(0),
+                       .label                  = "GPIOE",
+                       .owner                  = THIS_MODULE,
+                       .ngpio                  = 16,
+               },
+       },
+       [5] = {
+               .base   = S3C2410_GPFCON,
+               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
+               .chip   = {
+                       .base                   = S3C2410_GPF(0),
+                       .owner                  = THIS_MODULE,
+                       .label                  = "GPIOF",
+                       .ngpio                  = 8,
+                       .to_irq                 = s3c24xx_gpiolib_bankf_toirq,
+               },
+       },
+       [6] = {
+               .base   = S3C2410_GPGCON,
+               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
+               .irq_base = IRQ_EINT8,
+               .chip   = {
+                       .base                   = S3C2410_GPG(0),
+                       .owner                  = THIS_MODULE,
+                       .label                  = "GPIOG",
+                       .ngpio                  = 16,
+                       .to_irq                 = samsung_gpiolib_to_irq,
+               },
+       }, {
+               .base   = S3C2410_GPHCON,
+               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
+               .chip   = {
+                       .base                   = S3C2410_GPH(0),
+                       .owner                  = THIS_MODULE,
+                       .label                  = "GPIOH",
+                       .ngpio                  = 11,
+               },
+       },
+               /* GPIOS for the S3C2443 and later devices. */
+       {
+               .base   = S3C2440_GPJCON,
+               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
+               .chip   = {
+                       .base                   = S3C2410_GPJ(0),
+                       .owner                  = THIS_MODULE,
+                       .label                  = "GPIOJ",
+                       .ngpio                  = 16,
+               },
+       }, {
+               .base   = S3C2443_GPKCON,
+               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
+               .chip   = {
+                       .base                   = S3C2410_GPK(0),
+                       .owner                  = THIS_MODULE,
+                       .label                  = "GPIOK",
+                       .ngpio                  = 16,
+               },
+       }, {
+               .base   = S3C2443_GPLCON,
+               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
+               .chip   = {
+                       .base                   = S3C2410_GPL(0),
+                       .owner                  = THIS_MODULE,
+                       .label                  = "GPIOL",
+                       .ngpio                  = 15,
+               },
+       }, {
+               .base   = S3C2443_GPMCON,
+               .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
+               .chip   = {
+                       .base                   = S3C2410_GPM(0),
+                       .owner                  = THIS_MODULE,
+                       .label                  = "GPIOM",
+                       .ngpio                  = 2,
+               },
+       },
+};
+
+static __init int s3c24xx_gpiolib_init(void)
+{
+       struct s3c_gpio_chip *chip = s3c24xx_gpios;
+       int gpn;
+
+       for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++) {
+               if (!chip->config)
+                       chip->config = &s3c24xx_gpiocfg_default;
+
+               s3c_gpiolib_add(chip);
+       }
+
+       return 0;
+}
+core_initcall(s3c24xx_gpiolib_init);
+
+/* gpiolib wrappers until these are totally eliminated */
+
+void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
+{
+       int ret;
+
+       WARN_ON(to);    /* should be none of these left */
+
+       if (!to) {
+               /* if pull is enabled, try first with up, and if that
+                * fails, try using down */
+
+               ret = s3c_gpio_setpull(pin, S3C_GPIO_PULL_UP);
+               if (ret)
+                       s3c_gpio_setpull(pin, S3C_GPIO_PULL_DOWN);
+       } else {
+               s3c_gpio_setpull(pin, S3C_GPIO_PULL_NONE);
+       }
+}
+EXPORT_SYMBOL(s3c2410_gpio_pullup);
+
+void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
+{
+       /* do this via gpiolib until all users removed */
+
+       gpio_request(pin, "temporary");
+       gpio_set_value(pin, to);
+       gpio_free(pin);
+}
+EXPORT_SYMBOL(s3c2410_gpio_setpin);
+
+unsigned int s3c2410_gpio_getpin(unsigned int pin)
+{
+       struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
+       unsigned long offs = pin - chip->chip.base;
+
+       return __raw_readl(chip->base + 0x04) & (1<< offs);
+}
+EXPORT_SYMBOL(s3c2410_gpio_getpin);
+
+unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change)
+{
+       unsigned long flags;
+       unsigned long misccr;
+
+       local_irq_save(flags);
+       misccr = __raw_readl(S3C24XX_MISCCR);
+       misccr &= ~clear;
+       misccr ^= change;
+       __raw_writel(misccr, S3C24XX_MISCCR);
+       local_irq_restore(flags);
+
+       return misccr;
+}
+EXPORT_SYMBOL(s3c2410_modify_misccr);