drm/i915: add PIXCLK_GATE register

Pixel clock gating control for Lynx point.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 542128c80546c6efdec63e577d61fe782d216d5e..a9a47f6ef7d16a65631f5f82e0ac79947defc523 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4128,4 +4128,10 @@
 #define  SBI_RESPONSE_SUCCESS  (0x0<<1)
 #define  SBI_BUSY                              (0x1<<0)
 #define  SBI_READY                             (0x0<<0)
+
+/* LPT PIXCLK_GATE */
+#define PIXCLK_GATE                            0xC6020
+#define  PIXCLK_GATE_UNGATE            1<<0
+#define  PIXCLK_GATE_GATE              0<<0
+
 #endif /* _I915_REG_H_ */