ARM: dts: sk-rzg1m: add Ether pins
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Thu, 20 Apr 2017 18:51:35 +0000 (21:51 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Thu, 27 Jul 2017 14:28:32 +0000 (16:28 +0200)
Add the (previously omitted) Ether/PHY pin data to the SK-RZG1M board's
device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7743-sk-rzg1m.dts

index 97a066c22003a5941a44058ea334087857e9685c..3d918d106593d2684eaa7e6e8f95de8695c3efbc 100644 (file)
                groups = "scif0_data_d";
                function = "scif0";
        };
+
+       ether_pins: ether {
+               groups = "eth_link", "eth_mdio", "eth_rmii";
+               function = "eth";
+       };
+
+       phy1_pins: phy1 {
+               groups = "intc_irq0";
+               function = "intc";
+       };
 };
 
 &scif0 {
@@ -54,6 +64,9 @@
 };
 
 &ether {
+       pinctrl-0 = <&ether_pins &phy1_pins>;
+       pinctrl-names = "default";
+
        phy-handle = <&phy1>;
        renesas,ether-link-active-low;
        status = "okay";