MIPS: asm: spinlock: Fix addiu instruction for R10000_LLSC_WAR case

Commit 5753762cbd1c("MIPS: asm: spinlock: Replace "sub" instruction
with "addiu") replaced the "sub" instruction with addiu but it did
not update the immediate value in the R10000_LLSC_WAR case.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Fixes: 5753762cbd1c("MIPS: asm: spinlock: Replace "sub" instruction with "addiu"")
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9385/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
index b4548690ade9916e1d94e844641a505fad43bea4..1fca2e0793dcbbebd75784b90ad8e2513e0fcd45 100644 (file)
--- a/arch/mips/include/asm/spinlock.h
+++ b/arch/mips/include/asm/spinlock.h
@@ -263,7 +263,7 @@ static inline void arch_read_unlock(arch_rwlock_t *rw)
        if (R10000_LLSC_WAR) {
                __asm__ __volatile__(
                "1:     ll      %1, %2          # arch_read_unlock      \n"
-               "       addiu   %1, 1                                   \n"
+               "       addiu   %1, -1                                  \n"
                "       sc      %1, %0                                  \n"
                "       beqzl   %1, 1b                                  \n"
                : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp)