ARM: dts: BCM63xx: Add ARMPLL device tree nodes

Add the ARM PLL controller which comes standard with the Cortex-A9 found
on the BCM63138 SoCs. This is the same controller as the one found in
the Broadcom iProc architecture, however, we have a separate compatible
string to indicate the integration difference, since the hardware is
different.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi
index 34cd6405125096e4cd9d830d30487d11c9ff7765..d0560e8cd6de745aff3a0c1e8fb7d84e7d0617d7 100644 (file)
--- a/arch/arm/boot/dts/bcm63138.dtsi
+++ b/arch/arm/boot/dts/bcm63138.dtsi
@@ -43,18 +43,31 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
-               arm_timer_clk: arm_timer_clk {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <500000000>;
-               };
-
+               /* UBUS peripheral clock */
                periph_clk: periph_clk {
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
                        clock-frequency = <50000000>;
                        clock-output-names = "periph";
                };
+
+               /* peripheral clock for system timer */
+               axi_clk: axi_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-factor-clock";
+                       clocks = <&armpll>;
+                       clock-div = <2>;
+                       clock-mult = <1>;
+               };
+
+               /* APB bus clock */
+               apb_clk: apb_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-factor-clock";
+                       clocks = <&armpll>;
+                       clock-div = <4>;
+                       clock-mult = <1>;
+               };
        };
 
        /* ARM bus */
@@ -93,14 +106,14 @@
                        compatible = "arm,cortex-a9-global-timer";
                        reg = <0x1e200 0x20>;
                        interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&arm_timer_clk>;
+                       clocks = <&axi_clk>;
                };
 
                local_timer: local-timer@1e600 {
                        compatible = "arm,cortex-a9-twd-timer";
                        reg = <0x1e600 0x20>;
                        interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&arm_timer_clk>;
+                       clocks = <&axi_clk>;
                };
 
                twd_watchdog: watchdog@1e620 {
@@ -109,6 +122,13 @@
                        interrupts = <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>;
                };
 
+               armpll: armpll {
+                       #clock-cells = <0>;
+                       compatible = "brcm,bcm63138-armpll";
+                       clocks = <&periph_clk>;
+                       reg = <0x20000 0xf00>;
+               };
+
                pmb0: reset-controller@4800c0 {
                        compatible = "brcm,bcm63138-pmb";
                        reg = <0x4800c0 0x10>;