drm/i915/skl: Mirror what we do on HSW for the power well enable log message
authorDamien Lespiau <damien.lespiau@intel.com>
Fri, 6 Mar 2015 18:50:50 +0000 (18:50 +0000)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 17 Mar 2015 21:30:07 +0000 (22:30 +0100)
Just to be more consistent with what we do on HSW.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_runtime_pm.c

index 8f34d3873cfb6e9cffc094801902061b5014d735..46ffb259d7cb427af29f3ef8336541cc10c4e2ca 100644 (file)
@@ -332,10 +332,10 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv,
        if (enable) {
                if (!enable_requested) {
                        I915_WRITE(HSW_PWR_WELL_DRIVER, tmp | req_mask);
-                       DRM_DEBUG_KMS("Enabling %s\n", power_well->name);
                }
 
                if (!is_enabled) {
+                       DRM_DEBUG_KMS("Enabling %s\n", power_well->name);
                        if (wait_for((I915_READ(HSW_PWR_WELL_DRIVER) &
                                state_mask), 1))
                                DRM_ERROR("%s enable timeout\n",