drm/i915/bdw: Implement WaSwitchSolVfFArbitrationPriority
authorBen Widawsky <benjamin.widawsky@intel.com>
Sun, 3 Nov 2013 04:07:40 +0000 (21:07 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 8 Nov 2013 17:09:55 +0000 (18:09 +0100)
GEN8 also needs this workaround.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Add a generic comment that we need to recheck all these w/a.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c

index b9496abd76dc90019a7115529a1771bf10b62db1..b05f141a5a0e001b2dcbc84a8809e824d174e692 100644 (file)
@@ -5188,6 +5188,12 @@ static void gen8_init_clock_gating(struct drm_device *dev)
        I915_WRITE(WM3_LP_ILK, 0);
        I915_WRITE(WM2_LP_ILK, 0);
        I915_WRITE(WM1_LP_ILK, 0);
+
+       /* FIXME(BDW): Check all the w/a, some might only apply to
+        * pre-production hw. */
+
+       /* WaSwitchSolVfFArbitrationPriority */
+       I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL);
 }
 
 static void haswell_init_clock_gating(struct drm_device *dev)