powerpc: introduce and document sdhci,wp-inverted property for eSDHC

eSDHC block in MPC837x SOCs reports inverted write-protect state, soon
sdhci-of driver will look for sdhci,wp-inverted properties to decide
whether apply a specific quirk.

So, document the property and add it to device tree source files.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Cc: Pierre Ossman <pierre@ossman.eu>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: David Vrabel <david.vrabel@csr.com>
Cc: Ben Dooks <ben@fluff.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

diff --git a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
index 3ed3797b50865fb374f3c36c88b82e03367244da..8a0040738969a222ad1b77527fb053196aff537c 100644 (file)
--- a/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
@@ -10,6 +10,8 @@ Required properties:
   - interrupts : should contain eSDHC interrupt.
   - interrupt-parent : interrupt source phandle.
   - clock-frequency : specifies eSDHC base clock frequency.
+  - sdhci,wp-inverted : (optional) specifies that eSDHC controller
+    reports inverted write-protect state;
   - sdhci,1-bit-only : (optional) specifies that a controller can
     only handle 1-bit data transfers.
 

diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index f32c2811c6d9afa2cde60c2d8b3d77885cbf37a6..855782c5e5ecc4043329f6edfa50ccc6fea078c3 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -159,6 +159,7 @@
                                reg = <0x2e000 0x1000>;
                                interrupts = <42 0x8>;
                                interrupt-parent = <&ipic>;
+                               sdhci,wp-inverted;
                                /* Filled in by U-Boot */
                                clock-frequency = <0>;
                        };

diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 28e022ac41796fb83d057060d61c8728de4d238a..9e2264b100080b69e3a33e3d30b1ec33766ae3b9 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -173,6 +173,7 @@
                                reg = <0x2e000 0x1000>;
                                interrupts = <42 0x8>;
                                interrupt-parent = <&ipic>;
+                               sdhci,wp-inverted;
                                /* Filled in by U-Boot */
                                clock-frequency = <111111111>;
                        };

diff --git a/arch/powerpc/boot/dts/mpc8377_wlan.dts b/arch/powerpc/boot/dts/mpc8377_wlan.dts
index 3febc4e91b104b7c1d4426f9eb9e0aecdbaad3be..9a603695723be25eca0216d76f5bd077f6859585 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8377_wlan.dts
+++ b/arch/powerpc/boot/dts/mpc8377_wlan.dts
@@ -150,6 +150,7 @@
                                reg = <0x2e000 0x1000>;
                                interrupts = <42 0x8>;
                                interrupt-parent = <&ipic>;
+                               sdhci,wp-inverted;
                                clock-frequency = <133333333>;
                        };
                };

diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index f720ab9af30dcc474eb7c255b21b6ce1e08c02a5..f70cf6000839bee050e0808ccfdf65c5dc5d988c 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -159,6 +159,7 @@
                                reg = <0x2e000 0x1000>;
                                interrupts = <42 0x8>;
                                interrupt-parent = <&ipic>;
+                               sdhci,wp-inverted;
                                /* Filled in by U-Boot */
                                clock-frequency = <0>;
                        };

diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index a11ead8214b4d699ef2e6e6740c19cbc08f4bb61..4e6a1a407bbd093bcf56cc553d0033c693b361bb 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -173,6 +173,7 @@
                                reg = <0x2e000 0x1000>;
                                interrupts = <42 0x8>;
                                interrupt-parent = <&ipic>;
+                               sdhci,wp-inverted;
                                /* Filled in by U-Boot */
                                clock-frequency = <111111111>;
                        };

diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 4fa221fd9bdc9d7f1236f08e61f1354517525904..645ec51cc6e1efe4579756acb727424e2dad20a6 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -157,6 +157,7 @@
                                reg = <0x2e000 0x1000>;
                                interrupts = <42 0x8>;
                                interrupt-parent = <&ipic>;
+                               sdhci,wp-inverted;
                                /* Filled in by U-Boot */
                                clock-frequency = <0>;
                        };

diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index e35dfba587c8d33425d80eb940f0d63a3fe38ba2..72336d504528b284fd70e854b6141a55f38d68a1 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -171,6 +171,7 @@
                                reg = <0x2e000 0x1000>;
                                interrupts = <42 0x8>;
                                interrupt-parent = <&ipic>;
+                               sdhci,wp-inverted;
                                /* Filled in by U-Boot */
                                clock-frequency = <111111111>;
                        };