i915: Fix up ring initialization to cover G45 oddities
authorKeith Packard <keithp@keithp.com>
Wed, 15 Oct 2008 00:20:35 +0000 (17:20 -0700)
committerDave Airlie <airlied@linux.ie>
Fri, 17 Oct 2008 21:10:53 +0000 (07:10 +1000)
G45 appears quite sensitive to ring initialization register writes,
sometimes leaving the HEAD register with the START register contents. Check
to make sure HEAD is reset correctly when START is written, and fix it up,
screaming loudly.

Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/i915/i915_gem.c

index a31ee3202f17baf9025ddbe94fedf89677bc30da..94b9bdce0c75c447b59b743b16fa77644e94b96e 100644 (file)
@@ -2350,6 +2350,7 @@ i915_gem_init_ringbuffer(struct drm_device *dev)
        struct drm_gem_object *obj;
        struct drm_i915_gem_object *obj_priv;
        int ret;
+       u32 head;
 
        ret = i915_gem_init_hws(dev);
        if (ret != 0)
@@ -2390,17 +2391,49 @@ i915_gem_init_ringbuffer(struct drm_device *dev)
 
        /* Stop the ring if it's running. */
        I915_WRITE(PRB0_CTL, 0);
-       I915_WRITE(PRB0_HEAD, 0);
        I915_WRITE(PRB0_TAIL, 0);
-       I915_WRITE(PRB0_START, 0);
+       I915_WRITE(PRB0_HEAD, 0);
 
        /* Initialize the ring. */
        I915_WRITE(PRB0_START, obj_priv->gtt_offset);
+       head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
+
+       /* G45 ring initialization fails to reset head to zero */
+       if (head != 0) {
+               DRM_ERROR("Ring head not reset to zero "
+                         "ctl %08x head %08x tail %08x start %08x\n",
+                         I915_READ(PRB0_CTL),
+                         I915_READ(PRB0_HEAD),
+                         I915_READ(PRB0_TAIL),
+                         I915_READ(PRB0_START));
+               I915_WRITE(PRB0_HEAD, 0);
+
+               DRM_ERROR("Ring head forced to zero "
+                         "ctl %08x head %08x tail %08x start %08x\n",
+                         I915_READ(PRB0_CTL),
+                         I915_READ(PRB0_HEAD),
+                         I915_READ(PRB0_TAIL),
+                         I915_READ(PRB0_START));
+       }
+
        I915_WRITE(PRB0_CTL,
                   ((obj->size - 4096) & RING_NR_PAGES) |
                   RING_NO_REPORT |
                   RING_VALID);
 
+       head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
+
+       /* If the head is still not zero, the ring is dead */
+       if (head != 0) {
+               DRM_ERROR("Ring initialization failed "
+                         "ctl %08x head %08x tail %08x start %08x\n",
+                         I915_READ(PRB0_CTL),
+                         I915_READ(PRB0_HEAD),
+                         I915_READ(PRB0_TAIL),
+                         I915_READ(PRB0_START));
+               return -EIO;
+       }
+
        /* Update our cache of the ring state */
        i915_kernel_lost_context(dev);