ARM: dts: tegra: fix PCI bus dtc warnings
authorRob Herring <robh@kernel.org>
Wed, 22 Mar 2017 02:03:06 +0000 (21:03 -0500)
committerThierry Reding <treding@nvidia.com>
Tue, 13 Jun 2017 14:49:57 +0000 (16:49 +0200)
dtc recently added PCI bus checks. Fix these warnings.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
14 files changed:
arch/arm/boot/dts/tegra124-apalis-eval.dts
arch/arm/boot/dts/tegra124-apalis.dtsi
arch/arm/boot/dts/tegra124-jetson-tk1.dts
arch/arm/boot/dts/tegra124.dtsi
arch/arm/boot/dts/tegra20-harmony.dts
arch/arm/boot/dts/tegra20-tamonten.dtsi
arch/arm/boot/dts/tegra20-tec.dts
arch/arm/boot/dts/tegra20-trimslice.dts
arch/arm/boot/dts/tegra20.dtsi
arch/arm/boot/dts/tegra30-apalis-eval.dts
arch/arm/boot/dts/tegra30-apalis.dtsi
arch/arm/boot/dts/tegra30-beaver.dts
arch/arm/boot/dts/tegra30-cardhu.dtsi
arch/arm/boot/dts/tegra30.dtsi

index 5b860ad5cbeef74a00e5a4d19a5dc6e0691da816..ecffcd115fa7776bdb029e5caf23b7ad9ad931e2 100644 (file)
@@ -63,7 +63,7 @@
                stdout-path = "serial0:115200n8";
        };
 
-       pcie-controller@01003000 {
+       pcie@1003000 {
                pci@1,0 {
                        status = "okay";
                };
index f9e623bdd5c3776cecea9def5e799fec706ccbea..5d9b18ef5af65b44b8cb87c4b3be5c70416b3eab 100644 (file)
@@ -54,7 +54,7 @@
                reg = <0x0 0x80000000 0x0 0x80000000>;
        };
 
-       pcie-controller@01003000 {
+       pcie@1003000 {
                status = "okay";
 
                avddio-pex-supply = <&vdd_1v05>;
index 53994f9fbbcc066bff8a8803904d8aeb48095ce1..7bacb2954f586357bb689dbbd4c51895a4f5653d 100644 (file)
@@ -27,7 +27,7 @@
                reg = <0x0 0x80000000 0x0 0x80000000>;
        };
 
-       pcie-controller@01003000 {
+       pcie@1003000 {
                status = "okay";
 
                avddio-pex-supply = <&vdd_1v05_run>;
index 187a36c6d0fccb773cdcb9063b80e3422dd691ab..1b10b14a6abdff8af2442412c87738c0eca85d27 100644 (file)
@@ -14,7 +14,7 @@
        #address-cells = <2>;
        #size-cells = <2>;
 
-       pcie-controller@01003000 {
+       pcie@1003000 {
                compatible = "nvidia,tegra124-pcie";
                device_type = "pci";
                reg = <0x0 0x01003000 0x0 0x00000800   /* PADS registers */
@@ -54,6 +54,7 @@
                        device_type = "pci";
                        assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
                        reg = <0x000800 0 0 0 0>;
+                       bus-range = <0x00 0xff>;
                        status = "disabled";
 
                        #address-cells = <3>;
@@ -67,6 +68,7 @@
                        device_type = "pci";
                        assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
                        reg = <0x001000 0 0 0 0>;
+                       bus-range = <0x00 0xff>;
                        status = "disabled";
 
                        #address-cells = <3>;
index d4fb4d39ede7f7dc6d0591bbc912cfaf3d6cefbd..41749693ec3cd60e6ecc28c724e7cad926ec312b 100644 (file)
                nvidia,sys-clock-req-active-high;
        };
 
-       pcie-controller@80003000 {
+       pcie@80003000 {
                status = "okay";
 
                avdd-pex-supply = <&pci_vdd_reg>;
index 27d2bbbf1eae250bf90f7f178e325327a6316344..7361f4a82e80de212b6e4b30feee6782258b26c4 100644 (file)
                nvidia,sys-clock-req-active-high;
        };
 
-       pcie-controller@80003000 {
+       pcie@80003000 {
                avdd-pex-supply = <&pci_vdd_reg>;
                vdd-pex-supply = <&pci_vdd_reg>;
                avdd-pex-pll-supply = <&pci_vdd_reg>;
index c12d8bead2eea89beccb58be81cdad22336d2b08..9cb534f4441e62d0fded7686c33108387176b573 100644 (file)
@@ -32,7 +32,7 @@
                };
        };
 
-       pcie-controller@80003000 {
+       pcie@80003000 {
                status = "okay";
 
                pci@1,0 {
index 87b07fbadbbedd209491c3972bdebe4e519a53e4..b902ab594afaade16ae4a78ecc8dd6f4b17074bb 100644 (file)
                nvidia,sys-clock-req-active-high;
        };
 
-       pcie-controller@80003000 {
+       pcie@80003000 {
                status = "okay";
 
                avdd-pex-supply = <&pci_vdd_reg>;
index e8807503f87c4d5ab6bf4d4c7750c0e8f08df5ce..7c85f97f72eac0b54913eced278fdec5c768a43a 100644 (file)
                reset-names = "fuse";
        };
 
-       pcie-controller@80003000 {
+       pcie@80003000 {
                compatible = "nvidia,tegra20-pcie";
                device_type = "pci";
                reg = <0x80003000 0x00000800   /* PADS registers */
                        device_type = "pci";
                        assigned-addresses = <0x82000800 0 0x80000000 0 0x1000>;
                        reg = <0x000800 0 0 0 0>;
+                       bus-range = <0x00 0xff>;
                        status = "disabled";
 
                        #address-cells = <3>;
                        device_type = "pci";
                        assigned-addresses = <0x82001000 0 0x80001000 0 0x1000>;
                        reg = <0x001000 0 0 0 0>;
+                       bus-range = <0x00 0xff>;
                        status = "disabled";
 
                        #address-cells = <3>;
index 99a69457dbf5006d2dcfca8d4b4621c70d16c313..fc530e4a96c47106c77f0fd9c67f60d359a5c24c 100644 (file)
@@ -21,7 +21,7 @@
                stdout-path = "serial0:115200n8";
        };
 
-       pcie-controller@00003000 {
+       pcie@3000 {
                status = "okay";
 
                pci@1,0 {
index f6c7c3e958ac39edf2ef91d10b1ccfdaf2d2d8c0..7a6a1a0146037311e8d7b49db463fbd256ad2982 100644 (file)
@@ -9,7 +9,7 @@
        model = "Toradex Apalis T30";
        compatible = "toradex,apalis_t30", "nvidia,tegra30";
 
-       pcie-controller@00003000 {
+       pcie@3000 {
                avdd-pexa-supply = <&vdd2_reg>;
                vdd-pexa-supply = <&vdd2_reg>;
                avdd-pexb-supply = <&vdd2_reg>;
index 0350002849d51ce456b06e00914acf37486b168f..4f41b18d95476b7e2db95b3cd9148bf0d8e6626a 100644 (file)
@@ -20,7 +20,7 @@
                reg = <0x80000000 0x7ff00000>;
        };
 
-       pcie-controller@00003000 {
+       pcie@3000 {
                status = "okay";
 
                avdd-pexa-supply = <&ldo1_reg>;
index f11012bb58cc11254446d628762dcd0bc4adf49c..83dc14a9b353acdb6856976a0be48fa7d0671e5e 100644 (file)
@@ -43,7 +43,7 @@
                reg = <0x80000000 0x40000000>;
        };
 
-       pcie-controller@00003000 {
+       pcie@3000 {
                status = "okay";
 
                /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
index bbb1c002e7f1740e920e4e4f2a7ce9799b7a7daa..13960fda747192959f3d7ef25b3fdb377bc691c2 100644 (file)
@@ -10,7 +10,7 @@
        compatible = "nvidia,tegra30";
        interrupt-parent = <&lic>;
 
-       pcie-controller@00003000 {
+       pcie@3000 {
                compatible = "nvidia,tegra30-pcie";
                device_type = "pci";
                reg = <0x00003000 0x00000800   /* PADS registers */
@@ -51,6 +51,7 @@
                        device_type = "pci";
                        assigned-addresses = <0x82000800 0 0x00000000 0 0x1000>;
                        reg = <0x000800 0 0 0 0>;
+                       bus-range = <0x00 0xff>;
                        status = "disabled";
 
                        #address-cells = <3>;
@@ -64,6 +65,7 @@
                        device_type = "pci";
                        assigned-addresses = <0x82001000 0 0x00001000 0 0x1000>;
                        reg = <0x001000 0 0 0 0>;
+                       bus-range = <0x00 0xff>;
                        status = "disabled";
 
                        #address-cells = <3>;
@@ -77,6 +79,7 @@
                        device_type = "pci";
                        assigned-addresses = <0x82001800 0 0x00004000 0 0x1000>;
                        reg = <0x001800 0 0 0 0>;
+                       bus-range = <0x00 0xff>;
                        status = "disabled";
 
                        #address-cells = <3>;