[ARM] Orion: DRAM mapping granularity is 64KiB, not 16MiB

The DRAM base address and size fields in the CPU's MBUS bridge have
64KiB granularity, instead of the currently used 16MiB.  Since all
of the currently supported MBUS peripherals support 64KiB granularity
as well, this patch changes the Orion address map code to stop
rounding base addresses down and sizes up to multiples of 16MiB.

Found by Ke Wei <kewei@marvell.com>.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Russell King <linux@arm.linux.org.uk>

diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 5ffbac9e15709f135aa6a122c701b07b6a270c86..267e9f960a5431fd4663d9f7c696b14e26a2bc68 100644 (file)
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -155,8 +155,8 @@ void __init orion5x_setup_cpu_mbus_bridge(void)
                        w = &orion5x_mbus_dram_info.cs[cs++];
                        w->cs_index = i;
                        w->mbus_attr = 0xf & ~(1 << i);
-                       w->base = base & 0xff000000;
-                       w->size = (size | 0x00ffffff) + 1;
+                       w->base = base & 0xffff0000;
+                       w->size = (size | 0x0000ffff) + 1;
                }
        }
        orion5x_mbus_dram_info.num_cs = cs;