drm/i915: Remove unused "valid" parameter from pte_encode

We never used any invalid ptes, those were put in place for
a possibility of doing gpu faults. However our batchbuffers are not
restricted in length, so everything needs to be pointing to something
and thus out-of-bounds is pointing to scratch.

Remove the valid flag as it is always true.

v2: Expand commit msg, patch reorder (Mika)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1476360162-24062-1-git-send-email-michal.winiarski@intel.com

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index cbda30543c701b1ab81ca54a4b6e6bdf8d508370..fe92e28ea0a83d0bec8e2bfd7af2494c0930037f 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -919,8 +919,7 @@ out_unpin:
        if (node.allocated) {
                wmb();
                ggtt->base.clear_range(&ggtt->base,
-                                      node.start, node.size,
-                                      true);
+                                      node.start, node.size);
                i915_gem_object_unpin_pages(obj);
                remove_mappable_node(&node);
        } else {
@@ -1228,8 +1227,7 @@ out_unpin:
        if (node.allocated) {
                wmb();
                ggtt->base.clear_range(&ggtt->base,
-                                      node.start, node.size,
-                                      true);
+                                      node.start, node.size);
                i915_gem_object_unpin_pages(obj);
                remove_mappable_node(&node);
        } else {

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 6a5aea292f7e9c9e01e9928115bef45199923857..1d02e74ce62dd9d64f82022b00193df783ff3ab1 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -370,8 +370,7 @@ static void reloc_cache_fini(struct reloc_cache *cache)
 
                        ggtt->base.clear_range(&ggtt->base,
                                               cache->node.start,
-                                              cache->node.size,
-                                              true);
+                                              cache->node.size);
                        drm_mm_remove_node(&cache->node);
                } else {
                        i915_vma_unpin((struct i915_vma *)cache->node.mm);

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 3069b56300ff3dc2e588206a02bcacc5d968a549..6de50e44954dd9ea75dca87e16c14bfef0e6079c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -191,15 +191,13 @@ static void ppgtt_unbind_vma(struct i915_vma *vma)
 {
        vma->vm->clear_range(vma->vm,
                             vma->node.start,
-                            vma->size,
-                            true);
+                            vma->size);
 }
 
 static gen8_pte_t gen8_pte_encode(dma_addr_t addr,
-                                 enum i915_cache_level level,
-                                 bool valid)
+                                 enum i915_cache_level level)
 {
-       gen8_pte_t pte = valid ? _PAGE_PRESENT | _PAGE_RW : 0;
+       gen8_pte_t pte = _PAGE_PRESENT | _PAGE_RW;
        pte |= addr;
 
        switch (level) {
@@ -234,9 +232,9 @@ static gen8_pde_t gen8_pde_encode(const dma_addr_t addr,
 
 static gen6_pte_t snb_pte_encode(dma_addr_t addr,
                                 enum i915_cache_level level,
-                                bool valid, u32 unused)
+                                u32 unused)
 {
-       gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+       gen6_pte_t pte = GEN6_PTE_VALID;
        pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
        switch (level) {
@@ -256,9 +254,9 @@ static gen6_pte_t snb_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t ivb_pte_encode(dma_addr_t addr,
                                 enum i915_cache_level level,
-                                bool valid, u32 unused)
+                                u32 unused)
 {
-       gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+       gen6_pte_t pte = GEN6_PTE_VALID;
        pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
        switch (level) {
@@ -280,9 +278,9 @@ static gen6_pte_t ivb_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t byt_pte_encode(dma_addr_t addr,
                                 enum i915_cache_level level,
-                                bool valid, u32 flags)
+                                u32 flags)
 {
-       gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+       gen6_pte_t pte = GEN6_PTE_VALID;
        pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
        if (!(flags & PTE_READ_ONLY))
@@ -296,9 +294,9 @@ static gen6_pte_t byt_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t hsw_pte_encode(dma_addr_t addr,
                                 enum i915_cache_level level,
-                                bool valid, u32 unused)
+                                u32 unused)
 {
-       gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+       gen6_pte_t pte = GEN6_PTE_VALID;
        pte |= HSW_PTE_ADDR_ENCODE(addr);
 
        if (level != I915_CACHE_NONE)
@@ -309,9 +307,9 @@ static gen6_pte_t hsw_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t iris_pte_encode(dma_addr_t addr,
                                  enum i915_cache_level level,
-                                 bool valid, u32 unused)
+                                 u32 unused)
 {
-       gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+       gen6_pte_t pte = GEN6_PTE_VALID;
        pte |= HSW_PTE_ADDR_ENCODE(addr);
 
        switch (level) {
@@ -474,7 +472,7 @@ static void gen8_initialize_pt(struct i915_address_space *vm,
        gen8_pte_t scratch_pte;
 
        scratch_pte = gen8_pte_encode(vm->scratch_page.daddr,
-                                     I915_CACHE_LLC, true);
+                                     I915_CACHE_LLC);
 
        fill_px(to_i915(vm->dev), pt, scratch_pte);
 }
@@ -487,7 +485,7 @@ static void gen6_initialize_pt(struct i915_address_space *vm,
        WARN_ON(vm->scratch_page.daddr == 0);
 
        scratch_pte = vm->pte_encode(vm->scratch_page.daddr,
-                                    I915_CACHE_LLC, true, 0);
+                                    I915_CACHE_LLC, 0);
 
        fill32_px(to_i915(vm->dev), pt, scratch_pte);
 }
@@ -765,13 +763,11 @@ static void gen8_ppgtt_clear_pte_range(struct i915_address_space *vm,
 }
 
 static void gen8_ppgtt_clear_range(struct i915_address_space *vm,
-                                  uint64_t start,
-                                  uint64_t length,
-                                  bool use_scratch)
+                                  uint64_t start, uint64_t length)
 {
        struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
        gen8_pte_t scratch_pte = gen8_pte_encode(vm->scratch_page.daddr,
-                                                I915_CACHE_LLC, use_scratch);
+                                                I915_CACHE_LLC);
 
        if (!USES_FULL_48BIT_PPGTT(vm->dev)) {
                gen8_ppgtt_clear_pte_range(vm, &ppgtt->pdp, start, length,
@@ -811,7 +807,7 @@ gen8_ppgtt_insert_pte_entries(struct i915_address_space *vm,
 
                pt_vaddr[pte] =
                        gen8_pte_encode(sg_page_iter_dma_address(sg_iter),
-                                       cache_level, true);
+                                       cache_level);
                if (++pte == GEN8_PTES) {
                        kunmap_px(ppgtt, pt_vaddr);
                        pt_vaddr = NULL;
@@ -1454,7 +1450,7 @@ static void gen8_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
        uint64_t start = ppgtt->base.start;
        uint64_t length = ppgtt->base.total;
        gen8_pte_t scratch_pte = gen8_pte_encode(vm->scratch_page.daddr,
-                                                I915_CACHE_LLC, true);
+                                                I915_CACHE_LLC);
 
        if (!USES_FULL_48BIT_PPGTT(vm->dev)) {
                gen8_dump_pdp(&ppgtt->pdp, start, length, scratch_pte, m);
@@ -1571,7 +1567,7 @@ static void gen6_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
        uint32_t start = ppgtt->base.start, length = ppgtt->base.total;
 
        scratch_pte = vm->pte_encode(vm->scratch_page.daddr,
-                                    I915_CACHE_LLC, true, 0);
+                                    I915_CACHE_LLC, 0);
 
        gen6_for_each_pde(unused, &ppgtt->pd, start, length, pde) {
                u32 expected;
@@ -1786,8 +1782,7 @@ static void gen6_ppgtt_enable(struct drm_device *dev)
 /* PPGTT support for Sandybdrige/Gen6 and later */
 static void gen6_ppgtt_clear_range(struct i915_address_space *vm,
                                   uint64_t start,
-                                  uint64_t length,
-                                  bool use_scratch)
+                                  uint64_t length)
 {
        struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
        gen6_pte_t *pt_vaddr, scratch_pte;
@@ -1798,7 +1793,7 @@ static void gen6_ppgtt_clear_range(struct i915_address_space *vm,
        unsigned last_pte, i;
 
        scratch_pte = vm->pte_encode(vm->scratch_page.daddr,
-                                    I915_CACHE_LLC, true, 0);
+                                    I915_CACHE_LLC, 0);
 
        while (num_entries) {
                last_pte = first_pte + num_entries;
@@ -1836,7 +1831,7 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm,
                        pt_vaddr = kmap_px(ppgtt->pd.page_table[act_pt]);
 
                pt_vaddr[act_pte] =
-                       vm->pte_encode(addr, cache_level, true, flags);
+                       vm->pte_encode(addr, cache_level, flags);
 
                if (++act_pte == GEN6_PTES) {
                        kunmap_px(ppgtt, pt_vaddr);
@@ -2296,8 +2291,7 @@ void i915_gem_suspend_gtt_mappings(struct drm_device *dev)
 
        i915_check_and_clear_faults(dev_priv);
 
-       ggtt->base.clear_range(&ggtt->base, ggtt->base.start, ggtt->base.total,
-                            true);
+       ggtt->base.clear_range(&ggtt->base, ggtt->base.start, ggtt->base.total);
 
        i915_ggtt_flush(dev_priv);
 }
@@ -2331,7 +2325,7 @@ static void gen8_ggtt_insert_page(struct i915_address_space *vm,
 
        rpm_atomic_seq = assert_rpm_atomic_begin(dev_priv);
 
-       gen8_set_pte(pte, gen8_pte_encode(addr, level, true));
+       gen8_set_pte(pte, gen8_pte_encode(addr, level));
 
        I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
        POSTING_READ(GFX_FLSH_CNTL_GEN6);
@@ -2358,7 +2352,7 @@ static void gen8_ggtt_insert_entries(struct i915_address_space *vm,
        gtt_entries = (gen8_pte_t __iomem *)ggtt->gsm + (start >> PAGE_SHIFT);
 
        for_each_sgt_dma(addr, sgt_iter, st) {
-               gtt_entry = gen8_pte_encode(addr, level, true);
+               gtt_entry = gen8_pte_encode(addr, level);
                gen8_set_pte(&gtt_entries[i++], gtt_entry);
        }
 
@@ -2422,7 +2416,7 @@ static void gen6_ggtt_insert_page(struct i915_address_space *vm,
 
        rpm_atomic_seq = assert_rpm_atomic_begin(dev_priv);
 
-       iowrite32(vm->pte_encode(addr, level, true, flags), pte);
+       iowrite32(vm->pte_encode(addr, level, flags), pte);
 
        I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
        POSTING_READ(GFX_FLSH_CNTL_GEN6);
@@ -2455,7 +2449,7 @@ static void gen6_ggtt_insert_entries(struct i915_address_space *vm,
        gtt_entries = (gen6_pte_t __iomem *)ggtt->gsm + (start >> PAGE_SHIFT);
 
        for_each_sgt_dma(addr, sgt_iter, st) {
-               gtt_entry = vm->pte_encode(addr, level, true, flags);
+               gtt_entry = vm->pte_encode(addr, level, flags);
                iowrite32(gtt_entry, &gtt_entries[i++]);
        }
 
@@ -2479,16 +2473,12 @@ static void gen6_ggtt_insert_entries(struct i915_address_space *vm,
 }
 
 static void nop_clear_range(struct i915_address_space *vm,
-                           uint64_t start,
-                           uint64_t length,
-                           bool use_scratch)
+                           uint64_t start, uint64_t length)
 {
 }
 
 static void gen8_ggtt_clear_range(struct i915_address_space *vm,
-                                 uint64_t start,
-                                 uint64_t length,
-                                 bool use_scratch)
+                                 uint64_t start, uint64_t length)
 {
        struct drm_i915_private *dev_priv = to_i915(vm->dev);
        struct i915_ggtt *ggtt = i915_vm_to_ggtt(vm);
@@ -2508,8 +2498,7 @@ static void gen8_ggtt_clear_range(struct i915_address_space *vm,
                num_entries = max_entries;
 
        scratch_pte = gen8_pte_encode(vm->scratch_page.daddr,
-                                     I915_CACHE_LLC,
-                                     use_scratch);
+                                     I915_CACHE_LLC);
        for (i = 0; i < num_entries; i++)
                gen8_set_pte(&gtt_base[i], scratch_pte);
        readl(gtt_base);
@@ -2519,8 +2508,7 @@ static void gen8_ggtt_clear_range(struct i915_address_space *vm,
 
 static void gen6_ggtt_clear_range(struct i915_address_space *vm,
                                  uint64_t start,
-                                 uint64_t length,
-                                 bool use_scratch)
+                                 uint64_t length)
 {
        struct drm_i915_private *dev_priv = to_i915(vm->dev);
        struct i915_ggtt *ggtt = i915_vm_to_ggtt(vm);
@@ -2540,7 +2528,7 @@ static void gen6_ggtt_clear_range(struct i915_address_space *vm,
                num_entries = max_entries;
 
        scratch_pte = vm->pte_encode(vm->scratch_page.daddr,
-                                    I915_CACHE_LLC, use_scratch, 0);
+                                    I915_CACHE_LLC, 0);
 
        for (i = 0; i < num_entries; i++)
                iowrite32(scratch_pte, &gtt_base[i]);
@@ -2587,8 +2575,7 @@ static void i915_ggtt_insert_entries(struct i915_address_space *vm,
 
 static void i915_ggtt_clear_range(struct i915_address_space *vm,
                                  uint64_t start,
-                                 uint64_t length,
-                                 bool unused)
+                                 uint64_t length)
 {
        struct drm_i915_private *dev_priv = to_i915(vm->dev);
        unsigned first_entry = start >> PAGE_SHIFT;
@@ -2672,13 +2659,11 @@ static void ggtt_unbind_vma(struct i915_vma *vma)
 
        if (vma->flags & I915_VMA_GLOBAL_BIND)
                vma->vm->clear_range(vma->vm,
-                                    vma->node.start, size,
-                                    true);
+                                    vma->node.start, size);
 
        if (vma->flags & I915_VMA_LOCAL_BIND && appgtt)
                appgtt->base.clear_range(&appgtt->base,
-                                        vma->node.start, size,
-                                        true);
+                                        vma->node.start, size);
 }
 
 void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj)
@@ -2749,13 +2734,12 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
                DRM_DEBUG_KMS("clearing unused GTT space: [%lx, %lx]\n",
                              hole_start, hole_end);
                ggtt->base.clear_range(&ggtt->base, hole_start,
-                                    hole_end - hole_start, true);
+                                      hole_end - hole_start);
        }
 
        /* And finally clear the reserved guard page */
        ggtt->base.clear_range(&ggtt->base,
-                              ggtt->base.total - PAGE_SIZE, PAGE_SIZE,
-                              true);
+                              ggtt->base.total - PAGE_SIZE, PAGE_SIZE);
 
        if (USES_PPGTT(dev_priv) && !USES_FULL_PPGTT(dev_priv)) {
                ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
@@ -2777,8 +2761,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
 
                ppgtt->base.clear_range(&ppgtt->base,
                                        ppgtt->base.start,
-                                       ppgtt->base.total,
-                                       true);
+                                       ppgtt->base.total);
 
                dev_priv->mm.aliasing_ppgtt = ppgtt;
                WARN_ON(ggtt->base.bind_vma != ggtt_bind_vma);
@@ -3264,8 +3247,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
        i915_check_and_clear_faults(dev_priv);
 
        /* First fill our portion of the GTT with scratch pages */
-       ggtt->base.clear_range(&ggtt->base, ggtt->base.start, ggtt->base.total,
-                              true);
+       ggtt->base.clear_range(&ggtt->base, ggtt->base.start, ggtt->base.total);
 
        ggtt->base.closed = true; /* skip rewriting PTE on VMA unbind */
 

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index bd93fb8f99d2bb277471389f89185b643773c7d5..c241d8143255546e88e3546a03d4c39df5899ad7 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -395,7 +395,7 @@ struct i915_address_space {
        /* FIXME: Need a more generic return type */
        gen6_pte_t (*pte_encode)(dma_addr_t addr,
                                 enum i915_cache_level level,
-                                bool valid, u32 flags); /* Create a valid PTE */
+                                u32 flags); /* Create a valid PTE */
        /* flags for pte_encode */
 #define PTE_READ_ONLY  (1<<0)
        int (*allocate_va_range)(struct i915_address_space *vm,
@@ -403,8 +403,7 @@ struct i915_address_space {
                                 uint64_t length);
        void (*clear_range)(struct i915_address_space *vm,
                            uint64_t start,
-                           uint64_t length,
-                           bool use_scratch);
+                           uint64_t length);
        void (*insert_page)(struct i915_address_space *vm,
                            dma_addr_t addr,
                            uint64_t offset,

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index e9d282270c72edc9a305b425497914bcbedcf926..a8ce358850d12959e5eae22386113d8e5aa3f9ea 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -848,7 +848,7 @@ unwind:
 
 out:
        compress_fini(&zstream, dst);
-       ggtt->base.clear_range(&ggtt->base, slot, PAGE_SIZE, true);
+       ggtt->base.clear_range(&ggtt->base, slot, PAGE_SIZE);
        return dst;
 }