ath9k: Fix tx throughput drops for AR9003 chips with AES encryption
authorRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Fri, 1 Jul 2011 13:07:33 +0000 (18:37 +0530)
committerJohn W. Linville <linville@tuxdriver.com>
Tue, 5 Jul 2011 18:42:37 +0000 (14:42 -0400)
While sending aggregated frames in AES, the AR5416 chips
required additional padding b/w subframes. This workaround
is not needed for edma (AR9003 family) chips. With this patch
~4Mbps thoughput improvement was observed in clear environment.

Cc: stable@kernel.org
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/xmit.c

index 3779b8977d4709a9ce68d85a8b2458d472deaea4..33443bcaa8d9b27c6b3a7d70be54a4e470c38efd 100644 (file)
@@ -671,7 +671,8 @@ static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid,
         * TODO - this could be improved to be dependent on the rate.
         *      The hardware can keep up at lower rates, but not higher rates
         */
-       if (fi->keyix != ATH9K_TXKEYIX_INVALID)
+       if ((fi->keyix != ATH9K_TXKEYIX_INVALID) &&
+           !(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA))
                ndelim += ATH_AGGR_ENCRYPTDELIM;
 
        /*