[COMMON] fimc-is2: added compile option for unused code - DCP
authorEunyoung Lee <ey470.lee@samsung.com>
Thu, 26 Apr 2018 01:09:16 +0000 (10:09 +0900)
committerCosmin Tanislav <demonsingur@gmail.com>
Mon, 22 Apr 2024 17:22:31 +0000 (20:22 +0300)
Change-Id: Ia16b77ba4f4471f6e29ddaea4d727cf080d0110d
Signed-off-by: Eunyoung Lee <ey470.lee@samsung.com>
drivers/media/platform/exynos/fimc-is2/Makefile
drivers/media/platform/exynos/fimc-is2/fimc-is-framemgr.h

index 2686f4521e863ddbde81073f6e35db2bcf8ef228..b9a4d6c3130f2109a4705bbcd46b5ea1df2ab7f3 100644 (file)
@@ -20,9 +20,6 @@ fimc-is-objs  := fimc-is-core.o \
                fimc-is-video-mec.o \
                fimc-is-video-dis.o \
                fimc-is-video-disc.o \
-               fimc-is-video-dcp.o \
-               fimc-is-video-dcps.o \
-               fimc-is-video-dcpc.o \
                fimc-is-video-mcs.o \
                fimc-is-video-mcsp.o \
                fimc-is-video-vra.o \
@@ -41,6 +38,10 @@ fimc-is-objs := fimc-is-core.o \
                fimc-is-binary.o \
                fimc-is-i2c-config.o
 
+obj-$(CONFIG_DCP_V1_0) += fimc-is-video-dcp.o \
+                              fimc-is-video-dcps.o \
+                              fimc-is-video-dcpc.o
+
 ifeq ($(CONFIG_USE_DIRECT_IS_CONTROL),y)
 fimc-is-objs += fimc-is-interface-wrap.o
 else
@@ -61,6 +62,7 @@ obj-$(CONFIG_EXYNOS_DEVICE_MIPI_CSIS_VER4) += fimc-is-device-csi_v4.o
 
 obj-$(CONFIG_EXYNOS_FIMC_BNS) += fimc-is-device-flite.o
 
+
 obj-$(CONFIG_VIDEO_EXYNOS_FIMC_IS2) += fimc-is.o
 obj-$(CONFIG_VIDEO_EXYNOS_FIMC_IS2) += sensor/
 obj-$(CONFIG_VIDEO_EXYNOS_FIMC_IS2) += ischain/
index 0659ec296d0330de387038a43c5803f015942047..cef9be565b21f2ed99ce0a7ff8614c6224fabad0 100644 (file)
@@ -44,6 +44,7 @@
 #define FRAMEMGR_ID_M4P                0x00400000
 #define FRAMEMGR_ID_M5P                0x00800000
 #define FRAMEMGR_ID_VRA                0x01000000
+#if defined(SOC_DCP)
 #define FRAMEMGR_ID_DCP0S      0x02000000
 #define FRAMEMGR_ID_DCP1S      0x04000000
 #define FRAMEMGR_ID_DCP0C      0x08000000
                                 FRAMEMGR_ID_DCP1C | FRAMEMGR_ID_DCP2C | \
                                 FRAMEMGR_ID_SSXVC0 | FRAMEMGR_ID_SSXVC1 | \
                                 FRAMEMGR_ID_SSXVC2 | FRAMEMGR_ID_SSXVC3)
+#else
+#define FRAMEMGR_ID_MEXC       0x02000000      /* for ME */
+#define FRAMEMGR_ID_HW         0x04000000
+#define FRAMEMGR_ID_SHOT       (FRAMEMGR_ID_SSX | FRAMEMGR_ID_3XS | \
+                                FRAMEMGR_ID_IXS | FRAMEMGR_ID_DXS | \
+                                FRAMEMGR_ID_MXS | FRAMEMGR_ID_VRA)
+#define FRAMEMGR_ID_STREAM     (FRAMEMGR_ID_3XC | FRAMEMGR_ID_3XP | \
+                                FRAMEMGR_ID_DXS | FRAMEMGR_ID_DXC | \
+                                FRAMEMGR_ID_M0P | FRAMEMGR_ID_M1P | \
+                                FRAMEMGR_ID_M2P | FRAMEMGR_ID_M3P | \
+                                FRAMEMGR_ID_M4P | FRAMEMGR_ID_M5P | \
+                                FRAMEMGR_ID_SSXVC0 | FRAMEMGR_ID_SSXVC1 | \
+                                FRAMEMGR_ID_SSXVC2 | FRAMEMGR_ID_SSXVC3)
+#endif
 /* #define TRACE_FRAME */
 #define TRACE_ID               (FRAMEMGR_ID_SHOT | FRAMEMGR_ID_STREAM | FRAMEMGR_ID_HW)