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drm/i915/gvt: emulate right behavior for tlb_control
authorPing Gao <ping.a.gao@intel.com>
Thu, 10 Nov 2016 07:27:20 +0000 (15:27 +0800)
committerZhenyu Wang <zhenyuw@linux.intel.com>
Mon, 14 Nov 2016 10:06:43 +0000 (18:06 +0800)
Emulate right behavior for tlb_control, set to ZERO upon write.

Signed-off-by: Ping Gao <ping.a.gao@intel.com>
Signed-off-by: Min He <min.he@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/handlers.c patch | blob | blame | history

diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 1b3db0c7a6db89412e19125e3452f5b8c7aa29b8..8d3389ee0506f0a883121c824075839eac75611a 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -1372,6 +1372,7 @@ static int gvt_reg_tlb_control_handler(struct intel_vgpu *vgpu,
        unsigned int id = 0;
 
        write_vreg(vgpu, offset, p_data, bytes);
+       vgpu_vreg(vgpu, offset) = 0;
 
        switch (offset) {
        case 0x4260: