drm/i915: there's no PIPESTAT on HAS_PCH_SPLIT platforms

So don't read it when capturing the error state. This solves
"unclaimed register" messages on Haswell when we have a GPU hang.

V2: Check for HAS_PCH_SPLIT instead of Gen5+ because VLV still has
this register.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 5fc178e1e515b36306fd017e1e52ce2d3b444ec5..3c2b05c3cefe4bf9c880dcac12978b1e14c18577 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1387,8 +1387,9 @@ static void i915_capture_error_state(struct drm_device *dev)
        else if (INTEL_INFO(dev)->gen == 6)
                error->forcewake = I915_READ(FORCEWAKE);
 
-       for_each_pipe(pipe)
-               error->pipestat[pipe] = I915_READ(PIPESTAT(pipe));
+       if (!HAS_PCH_SPLIT(dev))
+               for_each_pipe(pipe)
+                       error->pipestat[pipe] = I915_READ(PIPESTAT(pipe));
 
        if (INTEL_INFO(dev)->gen >= 6) {
                error->error = I915_READ(ERROR_GEN6);