u32 gamma_lut[3][65];
u32 cgc_lut[50];
u32 hsc_lut[35];
+u32 aps_lut[26];
#define TUNE_MODE_SIZE 4
u32 tune_mode[TUNE_MODE_SIZE][280];
0,0,0,0,0,0,0,1,15,1,0,1,0,0,0,0,0,0,0,5,-10,0,10,30,170,230,240,155,70,32,1,10,64,51,204
};
+int aps_gmarr_LUT64[3][65] = {
+ /*set slope = 1*/
+ {
+ 0, 4, 8, 12, 16, 20, 24, 28, 32, 36,
+ 40, 44, 48, 52, 56, 60, 64, 68, 72, 76,
+ 80, 84, 88, 92, 96, 100, 104, 108, 112, 116,
+ 120, 124, 128, 132, 136, 140, 144, 148, 152, 156,
+ 160, 164, 168, 172, 176, 180, 184, 188, 192, 196,
+ 200, 204, 208, 212, 216, 220, 224, 228, 232, 236,
+ 240, 244, 248, 252, 256,
+ },
+ /*set slope = 2.2*/
+ {
+ 0, 0, 0, 0, 0, 0, 1, 1, 2, 3,
+ 4, 5, 6, 7, 9, 10, 12, 13, 15, 17,
+ 19, 22, 24, 26, 29, 32, 35, 38, 41, 44,
+ 48, 51, 55, 59, 63, 67, 72, 76, 81, 86,
+ 91, 96, 101, 106, 112, 117, 123, 129, 135, 142,
+ 148, 155, 162, 169, 176, 183, 190, 198, 206, 214,
+ 222, 230, 238, 247, 256,
+ },
+ /*set slope = 1/2.2*/
+ {
+ 0, 38, 52, 63, 72, 80, 87, 93, 99, 104,
+ 110, 114, 119, 124, 128, 132, 136, 140, 143, 147,
+ 150, 154, 157, 160, 163, 166, 169, 172, 175, 178,
+ 181, 184, 186, 189, 192, 194, 197, 199, 201, 204,
+ 206, 209, 211, 213, 215, 218, 220, 222, 224, 226,
+ 228, 230, 232, 234, 236, 238, 240, 242, 244, 246,
+ 248, 250, 252, 254, 256,
+ },
+};
+
+int aps_gm_LUT64[65] = {
+ 0, 4, 8, 12, 16, 20, 24, 28, 32, 36,
+ 40, 44, 48, 52, 56, 60, 64, 68, 72, 76,
+ 80, 84, 88, 92, 96, 100, 104, 108, 112, 116,
+ 120, 124, 128, 132, 136, 140, 144, 148, 152, 156,
+ 160, 164, 168, 172, 176, 180, 184, 188, 192, 196,
+ 200, 204, 208, 212, 216, 220, 224, 228, 232, 236,
+ 240, 244, 248, 252, 256,
+};
+
static void dqe_dump(void)
{
int acquired = console_trylock();
struct decon_device *decon = get_decon_drvdata(0);
- if (IS_DECON_OFF_STATE(decon)) {
- decon_info("%s: DECON%d is disabled, state(%d)\n",
- __func__, decon->id, decon->state);
+ if (IS_DQE_OFF_STATE(decon)) {
+ decon_info("%s: DECON is disabled, state(%d)\n",
+ __func__, (decon) ? (decon->state) : -1);
return;
}
dqe->ctx.hsc[DQEHSCLUT_MAX - 1].addr = DQEHSC_SKIN_H;
dqe->ctx.hsc[DQEHSCLUT_MAX - 1].val = dqe_read(dqe->ctx.hsc[DQEHSCLUT_MAX - 1].addr);
+ for (i = 0; i < DQEAPSLUT_MAX - 4; i++) {
+ dqe->ctx.aps[i].addr = DQEAPSLUT_BASE + (i * 4);
+ dqe->ctx.aps[i].val = dqe_read(dqe->ctx.aps[i].addr);
+ }
+ dqe->ctx.aps[DQEAPSLUT_MAX - 4].addr = DQEAPS_PARTIAL_CON;
+ dqe->ctx.aps[DQEAPSLUT_MAX - 4].val = dqe_read(dqe->ctx.aps[DQEAPSLUT_MAX - 4].addr);
+ dqe->ctx.aps[DQEAPSLUT_MAX - 3].addr = DQEAPS_PARTIAL_ROI_UP_LEFT_POS;
+ dqe->ctx.aps[DQEAPSLUT_MAX - 3].val = dqe_read(dqe->ctx.aps[DQEAPSLUT_MAX - 3].addr);
+ dqe->ctx.aps[DQEAPSLUT_MAX - 2].addr = DQEAPS_PARTIAL_IBSI_01_00;
+ dqe->ctx.aps[DQEAPSLUT_MAX - 2].val = dqe_read(dqe->ctx.aps[DQEAPSLUT_MAX - 2].addr);
+ dqe->ctx.aps[DQEAPSLUT_MAX - 1].addr = DQEAPS_PARTIAL_IBSI_11_10;
+ dqe->ctx.aps[DQEAPSLUT_MAX - 1].val = dqe_read(dqe->ctx.aps[DQEAPSLUT_MAX - 1].addr);
+
for (i = 0; i < DQECGC1LUT_MAX; i++) {
dqe_dbg("0x%04x %d %d %d",
dqe->ctx.cgc[i].addr,
dqe_dbg("0x%04x %08x ",
dqe->ctx.hsc[i].addr, dqe->ctx.hsc[i].val);
}
+
+ for (i = 0; i < DQEAPSLUT_MAX; i++) {
+ dqe_dbg("0x%04x %08x ",
+ dqe->ctx.aps[i].addr, dqe->ctx.aps[i].val);
+ }
}
static void dqe_init_context(void)
dqe->ctx.hsc[9].val = 0x00008046; /* DQEHSC_POLY_CURVE2 */
dqe->ctx.hsc[10].val = 0x0040000a; /* DQEHSC_SKIN_H */
+ dqe->ctx.aps[0].val = 0x00808080; /* DQEAPS_GAIN */
+ dqe->ctx.aps[1].val = 0x000e000a; /* DQEAPS_WEIGHT */
+ dqe->ctx.aps[2].val = 0x00000001; /* DQEAPS_CTMODE */
+ dqe->ctx.aps[3].val = 0x00000001; /* DQEAPS_PPEN */
+ dqe->ctx.aps[4].val = 0x00ff0040; /* DQEAPS_TDRMINMAX */
+ dqe->ctx.aps[5].val = 0x0000008c; /* DQEAPS_AMBIENT_LIGHT */
+ dqe->ctx.aps[6].val = 0x000000ff; /* DQEAPS_BACK_LIGHT */
+ dqe->ctx.aps[7].val = 0x00000001; /* DQEAPS_DSTEP */
+ dqe->ctx.aps[8].val = 0x00000001; /* DQEAPS_SCALE_MODE*/
+ dqe->ctx.aps[9].val = 0x00000015; /* DQEAPS_THRESHOLD */
+ dqe->ctx.aps[10].val = 0x0000007f; /* DQEAPS_GAIN_LIMIT */
+ dqe->ctx.aps[11].val = 0x00000000; /* DQEAPS_PARTIAL_CON */
+ dqe->ctx.aps[12].val = 0x00000000; /* DQEAPS_PARTIAL_ROI_UP_LEFT_POS */
+ dqe->ctx.aps[13].val = 0x00000000; /* DQEAPS_PARTIAL_IBSI_01_00 */
+ dqe->ctx.aps[14].val = 0x00000000; /* DQEAPS_PARTIAL_IBSI_11_10 */
+
dqe->ctx.cgc_on = 0;
dqe->ctx.gamma_on = 0;
dqe->ctx.hsc_on = 0;
dqe->ctx.hsc_control = 0;
+ dqe->ctx.aps_on = 0;
dqe->ctx.need_udpate = true;
tune_mode[i][k] = tune_mode[i-1][k];
}
-static int dqe_save_context(void)
+int dqe_save_context(void)
{
int i;
struct dqe_device *dqe = dqe_drvdata;
dqe->ctx.hsc_on = dqe_reg_get_hsc_on();
dqe->ctx.hsc_control = dqe_reg_get_hsc_control();
+ dqe->ctx.aps_on = dqe_reg_get_aps_on();
+
return 0;
}
-static int dqe_restore_context(void)
+int dqe_restore_context(void)
{
int i;
struct dqe_device *dqe = dqe_drvdata;
dqe_reg_set_hsc_control(dqe->ctx.hsc_control);
}
+ for (i = 0; i < DQEAPSLUT_MAX; i++)
+ dqe_write(dqe->ctx.aps[i].addr,
+ dqe->ctx.aps[i].val);
+
+ if (dqe->ctx.aps_on) {
+ if (decon) {
+ dqe_reg_set_aps_full_pxl_num(decon->lcd_info);
+ dqe_dbg("dqe DQEAPS_FULL_PXL_NUM: %d\n",
+ dqe_reg_get_aps_full_pxl_num());
+
+ dqe_dbg("dqe DQEAPS_FULL_IMG_SIZESET: %x\n",
+ dqe_read(DQEAPS_FULL_IMG_SIZESET));
+ }
+ dqe_reg_set_aps_on(1);
+ } else
+ dqe_reg_set_aps_on(0);
+
dqe->ctx.need_udpate = false;
return 0;
DQEHSCLUT_SKIN_S2(hsc_lut[32]) | DQEHSCLUT_SKIN_S1(hsc_lut[31]));
}
+static void dqe_aps_lut_set(void)
+{
+ struct dqe_device *dqe = dqe_drvdata;
+
+ /* DQEAPS_GAIN */
+ dqe->ctx.aps[0].val = (
+ DQEAPSLUT_ST(aps_lut[0]) | DQEAPSLUT_NS(aps_lut[1]) |
+ DQEAPSLUT_LT(aps_lut[2]));
+ /* DQEAPS_WEIGHT */
+ dqe->ctx.aps[1].val = (
+ DQEAPSLUT_PL_W2(aps_lut[3]) | DQEAPSLUT_PL_W1(aps_lut[4]));
+ /* DQEAPS_CTMODE */
+ dqe->ctx.aps[2].val = (
+ DQEAPSLUT_CTMODE(aps_lut[5]));
+ /* DQEAPS_PPEN */
+ dqe->ctx.aps[3].val = (
+ DQEAPSLUT_PP_EN(aps_lut[6]));
+ /* DQEAPS_TDRMINMAX */
+ dqe->ctx.aps[4].val = (
+ DQEAPSLUT_TDR_MAX(aps_lut[7]) | DQEAPSLUT_TDR_MIN(aps_lut[8]));
+ /* DQEAPS_AMBIENT_LIGHT */
+ dqe->ctx.aps[5].val = (
+ DQEAPSLUT_AMBIENT_LIGHT(aps_lut[9]));
+ /* DQEAPS_BACK_LIGHT */
+ dqe->ctx.aps[6].val = (
+ DQEAPSLUT_BACK_LIGHT(aps_lut[10]));
+ /* DQEAPS_DSTEP */
+ dqe->ctx.aps[7].val = (
+ DQEAPSLUT_DSTEP(aps_lut[11]));
+ /* DQEAPS_SCALE_MODE */
+ dqe->ctx.aps[8].val = (
+ DQEAPSLUT_SCALE_MODE(aps_lut[12]));
+ /* DQEAPS_THRESHOLD */
+ dqe->ctx.aps[9].val = (
+ DQEAPSLUT_THRESHOLD_3(aps_lut[13]) | DQEAPSLUT_THRESHOLD_2(aps_lut[14]) |
+ DQEAPSLUT_THRESHOLD_1(aps_lut[15]));
+ /* DQEAPS_GAIN_LIMIT */
+ dqe->ctx.aps[10].val = (
+ DQEAPSLUT_GAIN_LIMIT(aps_lut[16]));
+ /* DQEAPS_PARTIAL_CON */
+ dqe->ctx.aps[11].val = (
+ DQEAPSLUT_ROI_SAME(aps_lut[17]) | DQEAPSLUT_UPDATE_METHOD(aps_lut[18]) |
+ DQEAPSLUT_PARTIAL_FRAME(aps_lut[19]));
+ /* DQEAPS_PARTIAL_ROI_UP_LEFT_POS */
+ dqe->ctx.aps[12].val = (
+ DQEAPSLUT_ROI_Y1(aps_lut[20]) | DQEAPSLUT_ROI_X1(aps_lut[21]));
+ /* DQEAPS_PARTIAL_IBSI_01_00 */
+ dqe->ctx.aps[13].val = (
+ DQEAPSLUT_IBSI_01(aps_lut[22]) | DQEAPSLUT_IBSI_00(aps_lut[23]));
+ /* DQEAPS_PARTIAL_IBSI_11_10 */
+ dqe->ctx.aps[14].val = (
+ DQEAPSLUT_IBSI_11(aps_lut[24]) | DQEAPSLUT_IBSI_10(aps_lut[25]));
+}
+
static ssize_t decon_dqe_gamma_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
- int i;
ssize_t count = 0;
struct dqe_device *dqe = dev_get_drvdata(dev);
+ int i, j, str_len = 0;
+ char gamma_result[1000] = {0, };
dqe_info("%s\n", __func__);
mutex_lock(&dqe->lock);
- for (i = 0; i < DQEGAMMALUT_MAX; i++) {
- dqe_info("%d %d ",
- DQEGAMMALUT_X_GET(dqe->ctx.gamma[i].val),
- DQEGAMMALUT_Y_GET(dqe->ctx.gamma[i].val));
- dqe_dbg("0x%04x %08x ",
- dqe->ctx.gamma[i].addr, dqe->ctx.gamma[i].val);
+ gamma_result[0] = '\0';
+ for (i = 0; i < 3; i++) {
+ for (j = 0; j < 65; j++) {
+ char num[5] = {0,};
+
+ sprintf(num, "%d,", gamma_lut[i][j]);
+ strcat(gamma_result, num);
+ }
}
+ str_len = strlen(gamma_result);
+ gamma_result[str_len - 1] = '\0';
mutex_unlock(&dqe->lock);
- count = snprintf(buf, PAGE_SIZE, "gamma_on = %d\n", dqe->ctx.gamma_on);
+ count = sprintf(buf, "%s\n", gamma_result);
return count;
}
goto err;
}
- if (decon) {
- if ((decon->state == DECON_STATE_OFF) ||
- (decon->state == DECON_STATE_INIT)) {
- dqe_err("decon is not enabled!(%d)\n", decon->state);
- ret = -1;
- goto err;
- }
- } else {
- dqe_err("decon is NULL!\n");
+ if (IS_DQE_OFF_STATE(decon)) {
+ dqe_err("decon is not enabled!(%d)\n", (decon) ? (decon->state) : -1);
ret = -1;
goto err;
}
static ssize_t decon_dqe_cgc_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
- int i;
ssize_t count = 0;
struct dqe_device *dqe = dev_get_drvdata(dev);
+ int i, str_len = 0;
+ char cgc_result[300] = {0, };
dqe_info("%s\n", __func__);
mutex_lock(&dqe->lock);
- for (i = 0; i < DQECGC1LUT_MAX; i++) {
- dqe_info("%d %d %d ",
- DQECGCLUT_R_GET(dqe->ctx.cgc[i].val),
- DQECGCLUT_G_GET(dqe->ctx.cgc[i].val),
- DQECGCLUT_B_GET(dqe->ctx.cgc[i].val));
- dqe_dbg("0x%04x %08x",
- dqe->ctx.cgc[i].addr, dqe->ctx.cgc[i].val);
+ cgc_result[0] = '\0';
+ for (i = 0; i < 50; i++) {
+ char num[5] = {0,};
+
+ sprintf(num, "%d,", cgc_lut[i]);
+ strcat(cgc_result, num);
}
+ str_len = strlen(cgc_result);
+ cgc_result[str_len - 1] = '\0';
mutex_unlock(&dqe->lock);
- count = snprintf(buf, PAGE_SIZE, "cgc_on = %d\n", dqe->ctx.cgc_on);
+ count = sprintf(buf, "%s\n", cgc_result);
return count;
}
goto err;
}
- if (decon) {
- if ((decon->state == DECON_STATE_OFF) ||
- (decon->state == DECON_STATE_INIT)) {
- dqe_err("decon is not enabled!(%d)\n", decon->state);
- ret = -1;
- goto err;
- }
- } else {
- dqe_err("decon is NULL!\n");
+ if (IS_DQE_OFF_STATE(decon)) {
+ dqe_err("decon is not enabled!(%d)\n", (decon) ? (decon->state) : -1);
ret = -1;
goto err;
}
{
ssize_t count = 0;
struct dqe_device *dqe = dev_get_drvdata(dev);
+ int i, str_len = 0;
+ char hsc_result[250] = {0, };
dqe_info("%s\n", __func__);
mutex_lock(&dqe->lock);
- dqe_info("%d %d %d %d %d %d",
- DQEHSCLUT_R_GET(dqe->ctx.hsc[0].val),
- DQEHSCLUT_G_GET(dqe->ctx.hsc[0].val),
- DQEHSCLUT_B_GET(dqe->ctx.hsc[0].val),
- DQEHSCLUT_C_GET(dqe->ctx.hsc[1].val),
- DQEHSCLUT_M_GET(dqe->ctx.hsc[1].val),
- DQEHSCLUT_Y_GET(dqe->ctx.hsc[1].val));
-
- dqe_info("%d %d %d %d %d %d",
- DQEHSCLUT_R_GET(dqe->ctx.hsc[6].val),
- DQEHSCLUT_G_GET(dqe->ctx.hsc[6].val),
- DQEHSCLUT_B_GET(dqe->ctx.hsc[6].val),
- DQEHSCLUT_C_GET(dqe->ctx.hsc[7].val),
- DQEHSCLUT_M_GET(dqe->ctx.hsc[7].val),
- DQEHSCLUT_Y_GET(dqe->ctx.hsc[7].val));
+ hsc_result[0] = '\0';
+ for (i = 0; i < 35; i++) {
+ char num[6] = {0,};
+
+ sprintf(num, "%d,", hsc_lut[i]);
+ strcat(hsc_result, num);
+ }
+ str_len = strlen(hsc_result);
+ hsc_result[str_len - 1] = '\0';
mutex_unlock(&dqe->lock);
- count = snprintf(buf, PAGE_SIZE, "hsc_on = %d\n", dqe->ctx.hsc_on);
+ count = sprintf(buf, "%s\n", hsc_result);
return count;
}
goto err;
}
- if (decon) {
- if ((decon->state == DECON_STATE_OFF) ||
- (decon->state == DECON_STATE_INIT)) {
- dqe_err("decon is not enabled!(%d)\n", decon->state);
- ret = -1;
- goto err;
- }
- } else {
- dqe_err("decon is NULL!\n");
+ if (IS_DQE_OFF_STATE(decon)) {
+ dqe_err("decon is not enabled!(%d)\n", (decon) ? (decon->state) : -1);
ret = -1;
goto err;
}
decon_dqe_hsc_show,
decon_dqe_hsc_store);
+static ssize_t decon_dqe_aps_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ ssize_t count = 0;
+ struct dqe_device *dqe = dev_get_drvdata(dev);
+ int i, str_len = 0;
+ char aps_result[150] = {0, };
+
+ dqe_info("%s\n", __func__);
+
+ mutex_lock(&dqe->lock);
+
+ aps_result[0] = '\0';
+ for (i = 0; i < 26; i++) {
+ char num[5] = {0,};
+
+ sprintf(num, "%d,", aps_lut[i]);
+ strcat(aps_result, num);
+ }
+ str_len = strlen(aps_result);
+ aps_result[str_len - 1] = '\0';
+
+ mutex_unlock(&dqe->lock);
+
+ count = sprintf(buf, "%s\n", aps_result);
+
+ return count;
+}
+
+static ssize_t decon_dqe_aps_store(struct device *dev, struct device_attribute *attr,
+ const char *buffer, size_t count)
+{
+ int i, j, k;
+ int ret = 0;
+ char *head = NULL;
+ char *ptr = NULL;
+ struct dqe_device *dqe = dev_get_drvdata(dev);
+ struct decon_device *decon = get_decon_drvdata(0);
+
+ dqe_info("%s +\n", __func__);
+
+ mutex_lock(&dqe->lock);
+
+ if (count <= 0) {
+ dqe_err("aps write count error\n");
+ ret = -1;
+ goto err;
+ }
+
+ if (IS_DQE_OFF_STATE(decon)) {
+ dqe_err("decon is not enabled!(%d)\n", (decon) ? (decon->state) : -1);
+ ret = -1;
+ goto err;
+ }
+
+ head = (char *)buffer;
+ if (*head != 0) {
+ dqe_dbg("%s\n", head);
+ for (i = 0; i < 1; i++) {
+ k = 25;
+ for (j = 0; j < k; j++) {
+ ptr = strchr(head, ',');
+ if (ptr == NULL) {
+ dqe_err("not found comma.(%d, %d)\n", i, j);
+ ret = -EINVAL;
+ goto err;
+ }
+ *ptr = 0;
+ ret = kstrtou32(head, 0, &aps_lut[j]);
+ if (ret) {
+ dqe_err("strtos32(%d, %d) error.\n", i, j);
+ ret = -EINVAL;
+ goto err;
+ }
+ head = ptr + 1;
+ }
+ }
+ k = 0;
+ while (*(head + k) >= '0' && *(head + k) <= '9')
+ k++;
+ *(head + k) = 0;
+ ret = kstrtos32(head, 0, &aps_lut[j]);
+ if (ret) {
+ dqe_err("strtos32(%d, %d) error.\n", i-1, j);
+ ret = -EINVAL;
+ goto err;
+ }
+ } else {
+ dqe_err("buffer is null.\n");
+ goto err;
+ }
+
+ for (j = 0; j < 26; j++)
+ dqe_dbg("%d ", aps_lut[j]);
+
+ dqe_aps_lut_set();
+
+ dqe->ctx.need_udpate = false;
+
+ mutex_unlock(&dqe->lock);
+
+ dqe_info("%s -\n", __func__);
+
+ return count;
+err:
+ mutex_unlock(&dqe->lock);
+
+ dqe_info("%s : err(%d)\n", __func__, ret);
+
+ return ret;
+}
+
+static DEVICE_ATTR(aps, 0660,
+ decon_dqe_aps_show,
+ decon_dqe_aps_store);
+
+static ssize_t decon_dqe_aps_onoff_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ ssize_t count = 0;
+ struct dqe_device *dqe = dev_get_drvdata(dev);
+
+ dqe_info("%s\n", __func__);
+
+ count = snprintf(buf, PAGE_SIZE, "aps_onoff = %d\n", dqe->ctx.aps_on);
+
+ return count;
+}
+
+static ssize_t decon_dqe_aps_onoff_store(struct device *dev, struct device_attribute *attr,
+ const char *buffer, size_t count)
+{
+ int i, ret = 0;
+ unsigned int value = 0;
+ struct dqe_device *dqe = dev_get_drvdata(dev);
+ struct decon_device *decon = get_decon_drvdata(0);
+
+ dqe_info("%s +\n", __func__);
+
+ mutex_lock(&dqe->lock);
+
+ if (count <= 0) {
+ dqe_err("aps_onoff write count error\n");
+ ret = -1;
+ goto err;
+ }
+
+ if (IS_DQE_OFF_STATE(decon)) {
+ dqe_err("decon is not enabled!(%d)\n", (decon) ? (decon->state) : -1);
+ ret = -1;
+ goto err;
+ }
+
+ ret = kstrtouint(buffer, 0, &value);
+ if (ret < 0)
+ goto err;
+
+ dqe_info("%s: %d\n", __func__, value);
+
+ if (!value)
+ dqe->ctx.aps_on = 0;
+ else
+ dqe->ctx.aps_on = DQE_APS_ON_MASK;
+
+ dqe->ctx.need_udpate = true;
+
+ dqe_restore_context();
+
+ switch (value) {
+ case 1:
+ dqe_write(DQEAPS_FULL_PXL_NUM, 0);
+ dqe_write(DQEAPS_FULL_IMG_SIZESET, 0);
+ dqe_reg_set_aps_full_pxl_num(decon->lcd_info);
+ break;
+ case 2:
+ dqe_write(DQEAPS_FULL_PXL_NUM, 0);
+ dqe_write(DQEAPS_FULL_IMG_SIZESET, 0);
+ dqe_reg_set_aps_img_size(decon->lcd_info);
+ break;
+ case 3:
+ dqe_write(DQEAPS_FULL_PXL_NUM, 0);
+ dqe_write(DQEAPS_FULL_IMG_SIZESET, 0);
+ dqe_reg_set_aps_full_pxl_num(decon->lcd_info);
+ dqe_reg_set_aps_img_size(decon->lcd_info);
+ break;
+ case 4:
+ dqe_write(DQEAPS_FULL_PXL_NUM, 0);
+ dqe_write(DQEAPS_FULL_IMG_SIZESET, 0);
+ break;
+ case 11:
+ for (i = 0; i < 65; i++)
+ aps_gm_LUT64[i] = aps_gmarr_LUT64[0][i];
+ break;
+ case 12:
+ for (i = 0; i < 65; i++)
+ aps_gm_LUT64[i] = aps_gmarr_LUT64[1][i];
+ break;
+ case 13:
+ for (i = 0; i < 65; i++)
+ aps_gm_LUT64[i] = aps_gmarr_LUT64[2][i];
+ break;
+ default:
+ break;
+ }
+
+ dqe_info("dqe DQEAPS_FULL_PXL_NUM: %x\n",
+ dqe_read(DQEAPS_FULL_PXL_NUM));
+ dqe_info("dqe DQEAPS_FULL_IMG_SIZESET: %x\n",
+ dqe_read(DQEAPS_FULL_IMG_SIZESET));
+
+ decon_reg_update_req_dqe(decon->id);
+
+ mutex_unlock(&dqe->lock);
+
+ dqe_info("%s -\n", __func__);
+
+ return count;
+err:
+ mutex_unlock(&dqe->lock);
+
+ dqe_info("%s : err(%d)\n", __func__, ret);
+
+ return ret;
+}
+
+static DEVICE_ATTR(aps_onoff, 0660,
+ decon_dqe_aps_onoff_show,
+ decon_dqe_aps_onoff_store);
+
+int dqe_aps_gamma_LUT64(int gm_input)
+{
+ int gm_index = 0;
+ int gm_index_sub = 0;
+ int gm_index_subS = 0;
+
+ int gm_val_R = 0;
+ int gm_val_L = 0;
+
+ int gm_val_diff = 0;
+ int gm_val_mul = 0;
+ int gm_val_pre = 0;
+ int gm_val_p = 0;
+
+ //int gm_val = 0;
+ int gm_DOUT_pre = 0;
+
+ gm_index = (gm_input & APS_GAMMA_INPUT_MASK) >> APS_GAMMA_PHASE_SHIFT; //0~63
+ gm_index_sub = (gm_input & APS_GAMMA_PHASE_MASK); //0~15
+ gm_index_subS = (gm_input & APS_GAMMA_PHASE_MASK); //0~15
+
+ gm_val_R = aps_gm_LUT64[gm_index + 1];
+ gm_val_L = aps_gm_LUT64[gm_index];
+
+ gm_val_diff = gm_val_R - gm_val_L; // LUT index Rvalue - Lvalue
+ gm_val_mul = gm_val_diff * gm_index_subS;
+
+ gm_val_pre = (0x0 | gm_val_L << APS_GAMMA_PHASE_SHIFT) + gm_val_mul;
+ gm_val_p = ((gm_val_pre >> APS_GAMMA_PHASE_SHIFT) & APS_GAMMA_PIXEL_MAX) +
+ ((gm_val_pre >> (APS_GAMMA_PHASE_SHIFT - 1)) & 0x01);
+ gm_DOUT_pre = (gm_val_p > APS_GAMMA_PIXEL_MAX) ? APS_GAMMA_PIXEL_MAX : gm_val_p;
+
+ return gm_DOUT_pre;
+}
+
+int dqe_aps_convert_luma_to_al(int inLuma)
+{
+ int tmpAL;
+ int maxLuma = 5000;
+ int maxAL = 255;
+ int outAL;
+
+ if (inLuma > 5000)
+ inLuma = 5000;
+
+ // normailize
+ tmpAL = (inLuma * maxAL) / maxLuma;
+
+ outAL = dqe_aps_gamma_LUT64(tmpAL);
+
+ dqe_dbg("%s: %4d -> %3d\n", __func__, inLuma, outAL);
+
+ return outAL;
+}
+
+static ssize_t decon_dqe_aps_lux_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ ssize_t count = 0;
+ struct dqe_device *dqe = dev_get_drvdata(dev);
+ struct decon_device *decon = get_decon_drvdata(0);
+ int ret = 0;
+
+ mutex_lock(&dqe->lock);
+
+ if (IS_DQE_OFF_STATE(decon)) {
+ dqe_err("decon is not enabled!(%d)\n", (decon) ? (decon->state) : -1);
+ ret = -1;
+ }
+
+ if (ret > -1)
+ ret = dqe->ctx.aps_lux;
+
+ mutex_unlock(&dqe->lock);
+
+ count = snprintf(buf, PAGE_SIZE, "%d\n", ret);
+
+ return count;
+}
+
+static ssize_t decon_dqe_aps_lux_store(struct device *dev, struct device_attribute *attr,
+ const char *buffer, size_t count)
+{
+ int ret = 0;
+ unsigned int value = 0;
+ u32 outAL = 0;
+ struct dqe_device *dqe = dev_get_drvdata(dev);
+ struct decon_device *decon = get_decon_drvdata(0);
+
+ dqe_dbg("%s +\n", __func__);
+
+ mutex_lock(&dqe->lock);
+
+ if (count <= 0) {
+ dqe_err("aps_lux write count error\n");
+ ret = -1;
+ goto err;
+ }
+
+ if (IS_DQE_OFF_STATE(decon)) {
+ dqe_err("decon is not enabled!(%d)\n", (decon) ? (decon->state) : -1);
+ ret = -1;
+ goto err;
+ }
+
+ ret = kstrtouint(buffer, 0, &value);
+ if (ret < 0)
+ goto err;
+
+ dqe->ctx.aps_lux = value;
+ outAL = (u32)dqe_aps_convert_luma_to_al(value);
+
+ dqe_info("%s: %4d -> %3d\n", __func__, value, outAL);
+
+ /* DQEAPS_AMBIENT_LIGHT */
+ dqe->ctx.aps[5].val = (DQEAPSLUT_AMBIENT_LIGHT(outAL));
+
+ dqe_write(dqe->ctx.aps[5].addr, dqe->ctx.aps[5].val);
+
+ dqe->ctx.aps_on = DQE_APS_ON_MASK;
+
+ dqe_reg_set_aps_full_pxl_num(decon->lcd_info);
+
+ dqe_reg_set_aps_on(1);
+
+ decon_reg_update_req_dqe(decon->id);
+
+ mutex_unlock(&dqe->lock);
+
+ dqe_dbg("%s -\n", __func__);
+
+ return count;
+err:
+ mutex_unlock(&dqe->lock);
+
+ dqe_info("%s : err(%d)\n", __func__, ret);
+
+ return ret;
+}
+
+static DEVICE_ATTR(aps_lux, 0660,
+ decon_dqe_aps_lux_show,
+ decon_dqe_aps_lux_store);
+
static ssize_t decon_dqe_xml_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
goto err;
}
- if (decon) {
- if ((decon->state == DECON_STATE_OFF) ||
- (decon->state == DECON_STATE_INIT)) {
- dqe_err("decon is not enabled!(%d)\n", decon->state);
- ret = -1;
- goto err;
- }
- } else {
- dqe_err("decon is NULL!\n");
+ if (IS_DQE_OFF_STATE(decon)) {
+ dqe_err("decon is not enabled!(%d)\n", (decon) ? (decon->state) : -1);
ret = -1;
goto err;
}
&dev_attr_gamma.attr,
&dev_attr_cgc.attr,
&dev_attr_hsc.attr,
+ &dev_attr_aps.attr,
+ &dev_attr_aps_onoff.attr,
+ &dev_attr_aps_lux.attr,
&dev_attr_xml.attr,
&dev_attr_tune_mode1.attr,
&dev_attr_tune_mode2.attr,
mutex_lock(&dqe->lock);
- if (decon) {
- if ((decon->state == DECON_STATE_OFF) ||
- (decon->state == DECON_STATE_INIT)) {
- dqe_err("decon is not enabled!(%d)\n", decon->state);
- ret = -1;
- goto err;
- }
- } else {
- dqe_err("decon is NULL!\n");
+ if (IS_DQE_OFF_STATE(decon)) {
+ dqe_err("decon is not enabled!(%d)\n", (decon) ? (decon->state) : -1);
ret = -1;
goto err;
}
dqe->ctx.boosted_on = 0;
- if (decon) {
- if ((decon->state == DECON_STATE_OFF) ||
- (decon->state == DECON_STATE_INIT)) {
- dqe_err("decon is not enabled!(%d)\n", decon->state);
- goto err;
- }
- } else {
- dqe_err("decon is NULL!\n");
+ if (IS_DQE_OFF_STATE(decon)) {
+ dqe_err("decon is not enabled!(%d)\n", (decon) ? (decon->state) : -1);
goto err;
}
dqe_reg_start(decon->id, decon->lcd_info);
val = dqe_read(DQECON);
- dqe_info("dqe gamma:%d cgc:%d hsc:%d\n",
+ dqe_info("dqe gamma:%d cgc:%d hsc:%d aps:%d\n",
DQE_GAMMA_ON_GET(val),
DQE_CGC_ON_GET(val),
- DQE_HSC_ON_GET(val));
+ DQE_HSC_ON_GET(val),
+ DQE_APS_ON_GET(val));
}
void decon_dqe_disable(struct decon_device *decon)