drm/i915: set conservative clock gating values on VLV v2

We'll re-enable select bits as needed after testing and power measurement.

v2: split out wake handling bits (Jani)

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 0bb94d963b0a4a0409d2d58bbcf443f25f605627..8a3d89ecae695378af9b3959ba7098683600f01c 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3987,7 +3987,16 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
         * Disable clock gating on th GCFG unit to prevent a delay
         * in the reporting of vblank events.
         */
-       I915_WRITE(VLV_GUNIT_CLOCK_GATE, GCFG_DIS);
+       I915_WRITE(VLV_GUNIT_CLOCK_GATE, 0xffffffff);
+
+       /* Conservative clock gating settings for now */
+       I915_WRITE(0x9400, 0xffffffff);
+       I915_WRITE(0x9404, 0xffffffff);
+       I915_WRITE(0x9408, 0xffffffff);
+       I915_WRITE(0x940c, 0xffffffff);
+       I915_WRITE(0x9410, 0xffffffff);
+       I915_WRITE(0x9414, 0xffffffff);
+       I915_WRITE(0x9418, 0xffffffff);
 }
 
 static void g4x_init_clock_gating(struct drm_device *dev)