ARM: dts: rockchip: add rk322x iommu nodes

Add VPU/VDEC/VOP/IEP iommu nodes

Signed-off-by: Simon Xue <xxm@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index 1c43dea4c7cb3f20509e4e5569718ec3b97f3a6d..06814421eed2ef9c41fd5db803bc60f91ee85bed 100644 (file)
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -558,6 +558,42 @@
                status = "disabled";
        };
 
+       vpu_mmu: iommu@20020800 {
+               compatible = "rockchip,iommu";
+               reg = <0x20020800 0x100>;
+               interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "vpu_mmu";
+               iommu-cells = <0>;
+               status = "disabled";
+       };
+
+       vdec_mmu: iommu@20030480 {
+               compatible = "rockchip,iommu";
+               reg = <0x20030480 0x40>, <0x200304c0 0x40>;
+               interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "vdec_mmu";
+               iommu-cells = <0>;
+               status = "disabled";
+       };
+
+       vop_mmu: iommu@20053f00 {
+               compatible = "rockchip,iommu";
+               reg = <0x20053f00 0x100>;
+               interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "vop_mmu";
+               iommu-cells = <0>;
+               status = "disabled";
+       };
+
+       iep_mmu: iommu@20070800 {
+               compatible = "rockchip,iommu";
+               reg = <0x20070800 0x100>;
+               interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "iep_mmu";
+               iommu-cells = <0>;
+               status = "disabled";
+       };
+
        sdmmc: dwmmc@30000000 {
                compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x30000000 0x4000>;