ARM: dts: imx6ul: fix low case define in imx6ul-pinfunc.h

some pin name should be capital "_B" instead of "_b"

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6ul-pinfunc.h b/arch/arm/boot/dts/imx6ul-pinfunc.h
index 83d6ccb0c0f49e8c4cdb023cbe2c8c8c370d7135..20c7da1affce0c6bb2ab851c530b5be2f96661d3 100644 (file)
--- a/arch/arm/boot/dts/imx6ul-pinfunc.h
+++ b/arch/arm/boot/dts/imx6ul-pinfunc.h
@@ -666,7 +666,7 @@
 #define MX6UL_PAD_NAND_RE_B__ECSPI3_SS2                                0x0178 0x0404 0x0000 8 0
 #define MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B                              0x017c 0x0408 0x0000 0 0
 #define MX6UL_PAD_NAND_WE_B__USDHC2_CMD                                0x017c 0x0408 0x0678 1 2
-#define MX6UL_PAD_NAND_WE_B__QSPI_B_SS0_b                              0x017c 0x0408 0x0000 2 0
+#define MX6UL_PAD_NAND_WE_B__QSPI_B_SS0_B                              0x017c 0x0408 0x0000 2 0
 #define MX6UL_PAD_NAND_WE_B__KPP_COL00                                 0x017c 0x0408 0x0000 3 0
 #define MX6UL_PAD_NAND_WE_B__EIM_EB_B01                                0x017c 0x0408 0x0000 4 0
 #define MX6UL_PAD_NAND_WE_B__GPIO4_IO01                                0x017c 0x0408 0x0000 5 0
@@ -753,14 +753,14 @@
 #define MX6UL_PAD_NAND_READY_B__GPIO4_IO12                             0x01a8 0x0434 0x0000 5 0
 #define MX6UL_PAD_NAND_READY_B__UART3_DCE_TX                           0x01a8 0x0434 0x0000 8 0
 #define MX6UL_PAD_NAND_READY_B__UART3_DTE_RX                           0x01a8 0x0434 0x0634 8 2
-#define MX6UL_PAD_NAND_CE0_b__RAWNAND_CE0_b                            0x01ac 0x0438 0x0000 0 0
-#define MX6UL_PAD_NAND_CE0_b__USDHC1_DATA5                             0x01ac 0x0438 0x0000 1 0
-#define MX6UL_PAD_NAND_CE0_b__QSPI_A_DATA01                            0x01ac 0x0438 0x0000 2 0
-#define MX6UL_PAD_NAND_CE0_b__ECSPI3_SCLK                              0x01ac 0x0438 0x0554 3 1
-#define MX6UL_PAD_NAND_CE0_b__EIM_DTACK_B                              0x01ac 0x0438 0x0000 4 0
-#define MX6UL_PAD_NAND_CE0_b__GPIO4_IO13                               0x01ac 0x0438 0x0000 5 0
-#define MX6UL_PAD_NAND_CE0_b__UART3_DCE_RX                             0x01ac 0x0438 0x0634 8 3
-#define MX6UL_PAD_NAND_CE0_b__UART3_DTE_TX                             0x01ac 0x0438 0x0000 8 0
+#define MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B                            0x01ac 0x0438 0x0000 0 0
+#define MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5                             0x01ac 0x0438 0x0000 1 0
+#define MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01                            0x01ac 0x0438 0x0000 2 0
+#define MX6UL_PAD_NAND_CE0_B__ECSPI3_SCLK                              0x01ac 0x0438 0x0554 3 1
+#define MX6UL_PAD_NAND_CE0_B__EIM_DTACK_B                              0x01ac 0x0438 0x0000 4 0
+#define MX6UL_PAD_NAND_CE0_B__GPIO4_IO13                               0x01ac 0x0438 0x0000 5 0
+#define MX6UL_PAD_NAND_CE0_B__UART3_DCE_RX                             0x01ac 0x0438 0x0634 8 3
+#define MX6UL_PAD_NAND_CE0_B__UART3_DTE_TX                             0x01ac 0x0438 0x0000 8 0
 #define MX6UL_PAD_NAND_CE1_B__RAWNAND_CE1_B                            0x01b0 0x043c 0x0000 0 0
 #define MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6                             0x01b0 0x043c 0x0000 1 0
 #define MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02                            0x01b0 0x043c 0x0000 2 0
@@ -779,7 +779,7 @@
 #define MX6UL_PAD_NAND_CLE__UART3_DTE_CTS                              0x01b4 0x0440 0x0000 8 0
 #define MX6UL_PAD_NAND_DQS__RAWNAND_DQS                                0x01b8 0x0444 0x0000 0 0
 #define MX6UL_PAD_NAND_DQS__CSI_FIELD                                  0x01b8 0x0444 0x0530 1 1
-#define MX6UL_PAD_NAND_DQS__QSPI_A_SS0_b                               0x01b8 0x0444 0x0000 2 0
+#define MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B                               0x01b8 0x0444 0x0000 2 0
 #define MX6UL_PAD_NAND_DQS__PWM5_OUT                                   0x01b8 0x0444 0x0000 3 0
 #define MX6UL_PAD_NAND_DQS__EIM_WAIT                                   0x01b8 0x0444 0x0000 4 0
 #define MX6UL_PAD_NAND_DQS__GPIO4_IO16                                 0x01b8 0x0444 0x0000 5 0
@@ -834,7 +834,7 @@
 #define MX6UL_PAD_CSI_MCLK__USDHC2_CD_B                                0x01d4 0x0460 0x0674 1 0
 #define MX6UL_PAD_CSI_MCLK__RAWNAND_CE2_B                              0x01d4 0x0460 0x0000 2 0
 #define MX6UL_PAD_CSI_MCLK__I2C1_SDA                                   0x01d4 0x0460 0x05a8 3 0
-#define MX6UL_PAD_CSI_MCLK__EIM_CS0_b                                  0x01d4 0x0460 0x0000 4 0
+#define MX6UL_PAD_CSI_MCLK__EIM_CS0_B                                  0x01d4 0x0460 0x0000 4 0
 #define MX6UL_PAD_CSI_MCLK__GPIO4_IO17                                 0x01d4 0x0460 0x0000 5 0
 #define MX6UL_PAD_CSI_MCLK__SNVS_HP_VIO_5_CTL                          0x01d4 0x0460 0x0000 6 0
 #define MX6UL_PAD_CSI_MCLK__UART6_DCE_TX                               0x01d4 0x0460 0x0000 8 0