e1000e: fix PHY init workarounds for i217/i218
authorBruce Allan <bruce.w.allan@intel.com>
Fri, 4 Jan 2013 09:53:19 +0000 (09:53 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Sun, 27 Jan 2013 09:40:38 +0000 (01:40 -0800)
Toggling the LANPHYPC Value bit cycles the power on the PHY and sets it
back to power-on defaults.  This includes setting it's MAC-PHY messaging
mode to use the PCIe-like interconnect, so the MAC must also be set back
from SMBus mode to PCIe mode otherwise the PHY can be inaccessible.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/e1000e/ich8lan.c

index e0f41f0b5fe6fa0f82ea3d43795d04005640863c..3f3477ffd46cc9e1626f9746d933642a71a06773 100644 (file)
@@ -426,6 +426,15 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
                mac_reg |= E1000_FEXTNVM3_PHY_CFG_COUNTER_50MSEC;
                ew32(FEXTNVM3, mac_reg);
 
+               if (hw->mac.type == e1000_pch_lpt) {
+                       /* Toggling LANPHYPC brings the PHY out of SMBus mode
+                        * So ensure that the MAC is also out of SMBus mode
+                        */
+                       mac_reg = er32(CTRL_EXT);
+                       mac_reg &= ~E1000_CTRL_EXT_FORCE_SMBUS;
+                       ew32(CTRL_EXT, mac_reg);
+               }
+
                /* Toggle LANPHYPC Value bit */
                mac_reg = er32(CTRL);
                mac_reg |= E1000_CTRL_LANPHYPC_OVERRIDE;