drm/amdgpu: move amdgpu_uvd structure to uvd header

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 0cb305bf9c518f786d35aad2972dee4776281383..d7f9f1e6ae60c66c88e7ede6dacd6e654f878326 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -59,6 +59,7 @@
 #include "amd_powerplay.h"
 #include "amdgpu_dpm.h"
 #include "amdgpu_acp.h"
+#include "amdgpu_uvd.h"
 
 #include "gpu_scheduler.h"
 #include "amdgpu_virt.h"
@@ -1033,35 +1034,6 @@ void amdgpu_wb_free_64bit(struct amdgpu_device *adev, u32 wb);
 
 void amdgpu_get_pcie_info(struct amdgpu_device *adev);
 
-/*
- * UVD
- */
-#define AMDGPU_DEFAULT_UVD_HANDLES     10
-#define AMDGPU_MAX_UVD_HANDLES         40
-#define AMDGPU_UVD_STACK_SIZE          (200*1024)
-#define AMDGPU_UVD_HEAP_SIZE           (256*1024)
-#define AMDGPU_UVD_SESSION_SIZE                (50*1024)
-#define AMDGPU_UVD_FIRMWARE_OFFSET     256
-
-struct amdgpu_uvd {
-       struct amdgpu_bo        *vcpu_bo;
-       void                    *cpu_addr;
-       uint64_t                gpu_addr;
-       unsigned                fw_version;
-       void                    *saved_bo;
-       unsigned                max_handles;
-       atomic_t                handles[AMDGPU_MAX_UVD_HANDLES];
-       struct drm_file         *filp[AMDGPU_MAX_UVD_HANDLES];
-       struct delayed_work     idle_work;
-       const struct firmware   *fw;    /* UVD firmware */
-       struct amdgpu_ring      ring;
-       struct amdgpu_irq_src   irq;
-       bool                    address_64_bit;
-       bool                    use_ctx_buf;
-       struct amd_sched_entity entity;
-       uint32_t                srbm_soft_reset;
-};
-
 /*
  * VCE
  */

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
index c10682baccae188d921eec2b4e321b197a49f836..797210dd52deceb71471c598566be29c9be33d79 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
@@ -24,6 +24,32 @@
 #ifndef __AMDGPU_UVD_H__
 #define __AMDGPU_UVD_H__
 
+#define AMDGPU_DEFAULT_UVD_HANDLES     10
+#define AMDGPU_MAX_UVD_HANDLES         40
+#define AMDGPU_UVD_STACK_SIZE          (200*1024)
+#define AMDGPU_UVD_HEAP_SIZE           (256*1024)
+#define AMDGPU_UVD_SESSION_SIZE                (50*1024)
+#define AMDGPU_UVD_FIRMWARE_OFFSET     256
+
+struct amdgpu_uvd {
+       struct amdgpu_bo        *vcpu_bo;
+       void                    *cpu_addr;
+       uint64_t                gpu_addr;
+       unsigned                fw_version;
+       void                    *saved_bo;
+       unsigned                max_handles;
+       atomic_t                handles[AMDGPU_MAX_UVD_HANDLES];
+       struct drm_file         *filp[AMDGPU_MAX_UVD_HANDLES];
+       struct delayed_work     idle_work;
+       const struct firmware   *fw;    /* UVD firmware */
+       struct amdgpu_ring      ring;
+       struct amdgpu_irq_src   irq;
+       bool                    address_64_bit;
+       bool                    use_ctx_buf;
+       struct amd_sched_entity entity;
+       uint32_t                srbm_soft_reset;
+};
+
 int amdgpu_uvd_sw_init(struct amdgpu_device *adev);
 int amdgpu_uvd_sw_fini(struct amdgpu_device *adev);
 int amdgpu_uvd_suspend(struct amdgpu_device *adev);