#include <linux/gpio.h>
#include <linux/of.h>
#include <linux/of_irq.h>
+#include <linux/of_platform.h>
#include <linux/clk-provider.h>
#include <asm/setup.h>
at91rm9200_timer_init();
}
+static void __init rm9200_dt_device_init(void)
+{
+ at91_rm9200_pm_init();
+
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+
+
static const char *at91rm9200_dt_board_compat[] __initdata = {
"atmel,at91rm9200",
NULL
.init_time = at91rm9200_dt_timer_init,
.map_io = at91_map_io,
.init_early = at91_dt_initialize,
+ .init_machine = rm9200_dt_device_init,
.dt_compat = at91rm9200_dt_board_compat,
MACHINE_END
#include <linux/gpio.h>
#include <linux/of.h>
#include <linux/of_irq.h>
+#include <linux/of_platform.h>
#include <linux/clk-provider.h>
#include <asm/setup.h>
#include "generic.h"
+static void __init sam9_dt_device_init(void)
+{
+ at91_sam9260_pm_init();
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
static const char *at91_dt_board_compat[] __initdata = {
"atmel,at91sam9",
NULL
/* Maintainer: Atmel */
.map_io = at91_map_io,
.init_early = at91_dt_initialize,
+ .init_machine = sam9_dt_device_init,
.dt_compat = at91_dt_board_compat,
MACHINE_END
+
+static void __init sam9g45_dt_device_init(void)
+{
+ at91_sam9g45_pm_init();
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char *at91_9g45_board_compat[] __initconst = {
+ "atmel,at91sam9g45",
+ NULL
+};
+
+DT_MACHINE_START(at91sam9g45_dt, "Atmel AT91SAM9G45")
+ /* Maintainer: Atmel */
+ .map_io = at91_map_io,
+ .init_early = at91_dt_initialize,
+ .init_machine = sam9g45_dt_device_init,
+ .dt_compat = at91_9g45_board_compat,
+MACHINE_END
static void __init sama5_dt_device_init(void)
{
+ at91_sam9260_pm_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
/* Matrix */
extern void at91_ioremap_matrix(u32 base_addr);
+
+
+#ifdef CONFIG_PM
+extern void __init at91_rm9200_pm_init(void);
+extern void __init at91_sam9260_pm_init(void);
+extern void __init at91_sam9g45_pm_init(void);
+#else
+void __init at91_rm9200_pm_init(void) { }
+void __init at91_sam9260_pm_init(void) { }
+void __init at91_sam9g45_pm_init(void) { }
+#endif
+
#endif /* _AT91_GENERIC_H */
#endif
-static int __init at91_pm_init(void)
+static void __init at91_pm_init(void)
{
#ifdef CONFIG_AT91_SLOW_CLOCK
at91_pm_sram_init();
pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
- at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC;
- at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
-
- if (of_machine_is_compatible("atmel,at91rm9200")) {
- /*
- * AT91RM9200 SDRAM low-power mode cannot be used with
- * self-refresh.
- */
- at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
-
- at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP |
- AT91RM9200_PMC_UDP;
- at91_pm_data.memctrl = AT91_MEMCTRL_MC;
- } else if (of_machine_is_compatible("atmel,at91sam9g45")) {
- at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP;
- at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
- }
-
if (at91_cpuidle_device.dev.platform_data)
platform_device_register(&at91_cpuidle_device);
suspend_set_ops(&at91_pm_ops);
+}
- return 0;
+void __init at91_rm9200_pm_init(void)
+{
+ /*
+ * AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.
+ */
+ at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0);
+
+ at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP;
+ at91_pm_data.memctrl = AT91_MEMCTRL_MC;
+
+ at91_pm_init();
+}
+
+void __init at91_sam9260_pm_init(void)
+{
+ at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC;
+ at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
+ return at91_pm_init();
+}
+
+void __init at91_sam9g45_pm_init(void)
+{
+ at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP;
+ at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
+ return at91_pm_init();
}
-arch_initcall(at91_pm_init);