drm/amd/powerplay: refine code to avoid potential bug that the memory not cleared.
authorRex Zhu <Rex.Zhu@amd.com>
Mon, 6 Feb 2017 04:58:57 +0000 (12:58 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 9 Feb 2017 15:54:08 +0000 (10:54 -0500)
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

index 64e72c39b43c8abcdb3db2bc68886489ee3e9c32..b1de9e8ccdbce960079ed9ceab60c52942bd8a44 100644 (file)
@@ -4398,16 +4398,14 @@ static int smu7_get_sclks(struct pp_hwmgr *hwmgr, struct amd_pp_clocks *clocks)
                if (table_info == NULL || table_info->vdd_dep_on_sclk == NULL)
                        return -EINVAL;
                dep_sclk_table = table_info->vdd_dep_on_sclk;
-               for (i = 0; i < dep_sclk_table->count; i++) {
+               for (i = 0; i < dep_sclk_table->count; i++)
                        clocks->clock[i] = dep_sclk_table->entries[i].clk;
-                       clocks->count++;
-               }
+               clocks->count = dep_sclk_table->count;
        } else if (hwmgr->pp_table_version == PP_TABLE_V0) {
                sclk_table = hwmgr->dyn_state.vddc_dependency_on_sclk;
-               for (i = 0; i < sclk_table->count; i++) {
+               for (i = 0; i < sclk_table->count; i++)
                        clocks->clock[i] = sclk_table->entries[i].clk;
-                       clocks->count++;
-               }
+               clocks->count = sclk_table->count;
        }
 
        return 0;
@@ -4441,14 +4439,13 @@ static int smu7_get_mclks(struct pp_hwmgr *hwmgr, struct amd_pp_clocks *clocks)
                        clocks->clock[i] = dep_mclk_table->entries[i].clk;
                        clocks->latency[i] = smu7_get_mem_latency(hwmgr,
                                                dep_mclk_table->entries[i].clk);
-                       clocks->count++;
                }
+               clocks->count = dep_mclk_table->count;
        } else if (hwmgr->pp_table_version == PP_TABLE_V0) {
                mclk_table = hwmgr->dyn_state.vddc_dependency_on_mclk;
-               for (i = 0; i < mclk_table->count; i++) {
+               for (i = 0; i < mclk_table->count; i++)
                        clocks->clock[i] = mclk_table->entries[i].clk;
-                       clocks->count++;
-               }
+               clocks->count = mclk_table->count;
        }
        return 0;
 }