#define RTS_PINCTRL (1)
#define DEFAULT_PINCTRL (0)
+static void uart_sfr_dump(struct s3c24xx_uart_port *ourport)
+{
+ struct uart_port *port = &ourport->port;
+
+ dev_err(ourport->port.dev, " Register dump\n"
+ "ULCON 0x%08x "
+ "UCON 0x%08x "
+ "UFCON 0x%08x \n"
+ "UMCON 0x%08x "
+ "UTRSTAT 0x%08x "
+ "UERSTAT 0x%08x "
+ "UMSTAT 0x%08x \n"
+ "UBRDIV 0x%08x "
+ "UINTP 0x%08x "
+ "UINTM 0x%08x \n"
+ , readl(port->membase + S3C2410_ULCON)
+ , readl(port->membase + S3C2410_UCON)
+ , readl(port->membase + S3C2410_UFCON)
+ , readl(port->membase + S3C2410_UMCON)
+ , readl(port->membase + S3C2410_UTRSTAT)
+ , readl(port->membase + S3C2410_UERSTAT)
+ , readl(port->membase + S3C2410_UMSTAT)
+ , readl(port->membase + S3C2410_UBRDIV)
+ , readl(port->membase + S3C64XX_UINTP)
+ , readl(port->membase + S3C64XX_UINTM)
+ );
+}
+
static void change_uart_gpio(int value, struct s3c24xx_uart_port *ourport)
{
int status = 0;
dbg("rxerr: port ch=0x%02x, rxs=0x%08x\n",
ch, uerstat);
+ uart_sfr_dump(ourport);
+
/* check for break */
if (uerstat & S3C2410_UERSTAT_BREAK) {
dbg("break!\n");