dmaengine: move last completed cookie into generic dma_chan structure
authorRussell King - ARM Linux <linux@arm.linux.org.uk>
Tue, 6 Mar 2012 22:34:06 +0000 (22:34 +0000)
committerVinod Koul <vinod.koul@linux.intel.com>
Tue, 13 Mar 2012 06:06:06 +0000 (11:36 +0530)
Every DMA engine implementation declares a last completed dma cookie
in their private dma channel structures.  This is pointless, and
forces driver specific code.  Move this out into the common dma_chan
structure.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
37 files changed:
arch/arm/include/asm/hardware/iop_adma.h
drivers/dma/amba-pl08x.c
drivers/dma/at_hdmac.c
drivers/dma/at_hdmac_regs.h
drivers/dma/coh901318.c
drivers/dma/dw_dmac.c
drivers/dma/dw_dmac_regs.h
drivers/dma/ep93xx_dma.c
drivers/dma/fsldma.c
drivers/dma/fsldma.h
drivers/dma/imx-dma.c
drivers/dma/imx-sdma.c
drivers/dma/intel_mid_dma.c
drivers/dma/intel_mid_dma_regs.h
drivers/dma/ioat/dma.c
drivers/dma/ioat/dma.h
drivers/dma/ioat/dma_v2.c
drivers/dma/ioat/dma_v3.c
drivers/dma/iop-adma.c
drivers/dma/ipu/ipu_idmac.c
drivers/dma/mpc512x_dma.c
drivers/dma/mv_xor.c
drivers/dma/mv_xor.h
drivers/dma/mxs-dma.c
drivers/dma/pch_dma.c
drivers/dma/pl330.c
drivers/dma/ppc4xx/adma.c
drivers/dma/ppc4xx/adma.h
drivers/dma/shdma.c
drivers/dma/shdma.h
drivers/dma/sirf-dma.c
drivers/dma/ste_dma40.c
drivers/dma/timb_dma.c
drivers/dma/txx9dmac.c
drivers/dma/txx9dmac.h
include/linux/amba/pl08x.h
include/linux/dmaengine.h

index 59b8c3892f76731608b346d0d100910e9047c481..122f86d8c991d73e587c786eba41bf85a6ec5a21 100644 (file)
@@ -49,7 +49,6 @@ struct iop_adma_device {
 /**
  * struct iop_adma_chan - internal representation of an ADMA device
  * @pending: allows batching of hardware operations
- * @completed_cookie: identifier for the most recently completed operation
  * @lock: serializes enqueue/dequeue operations to the slot pool
  * @mmr_base: memory mapped register base
  * @chain: device chain view of the descriptors
@@ -62,7 +61,6 @@ struct iop_adma_device {
  */
 struct iop_adma_chan {
        int pending;
-       dma_cookie_t completed_cookie;
        spinlock_t lock; /* protects the descriptor slot pool */
        void __iomem *mmr_base;
        struct list_head chain;
index 513184b4fdd1e2041d1c2c64916f9281af49587c..e510447a685a756dfd427a94ae59de0e2eceef38 100644 (file)
@@ -971,7 +971,7 @@ static enum dma_status pl08x_dma_tx_status(struct dma_chan *chan,
        u32 bytesleft = 0;
 
        last_used = plchan->chan.cookie;
-       last_complete = plchan->lc;
+       last_complete = plchan->chan.completed_cookie;
 
        ret = dma_async_is_complete(cookie, last_complete, last_used);
        if (ret == DMA_SUCCESS) {
@@ -983,7 +983,7 @@ static enum dma_status pl08x_dma_tx_status(struct dma_chan *chan,
         * This cookie not complete yet
         */
        last_used = plchan->chan.cookie;
-       last_complete = plchan->lc;
+       last_complete = plchan->chan.completed_cookie;
 
        /* Get number of bytes left in the active transactions and queue */
        bytesleft = pl08x_getbytes_chan(plchan);
@@ -1543,7 +1543,7 @@ static void pl08x_tasklet(unsigned long data)
 
        if (txd) {
                /* Update last completed */
-               plchan->lc = txd->tx.cookie;
+               plchan->chan.completed_cookie = txd->tx.cookie;
        }
 
        /* If a new descriptor is queued, set it up plchan->at is NULL here */
@@ -1725,7 +1725,7 @@ static int pl08x_dma_init_virtual_channels(struct pl08x_driver_data *pl08x,
 
                chan->chan.device = dmadev;
                chan->chan.cookie = 0;
-               chan->lc = 0;
+               chan->chan.completed_cookie = 0;
 
                spin_lock_init(&chan->lock);
                INIT_LIST_HEAD(&chan->pend_list);
index f4aed5fc2cb6c33d87d8932d8603f705d3d2e589..6baf5d717262ff5346fd73b740fc8bb7ad0c7659 100644 (file)
@@ -269,7 +269,7 @@ atc_chain_complete(struct at_dma_chan *atchan, struct at_desc *desc)
        dev_vdbg(chan2dev(&atchan->chan_common),
                "descriptor %u complete\n", txd->cookie);
 
-       atchan->completed_cookie = txd->cookie;
+       atchan->chan_common.completed_cookie = txd->cookie;
 
        /* move children to free_list */
        list_splice_init(&desc->tx_list, &atchan->free_list);
@@ -1016,14 +1016,14 @@ atc_tx_status(struct dma_chan *chan,
 
        spin_lock_irqsave(&atchan->lock, flags);
 
-       last_complete = atchan->completed_cookie;
+       last_complete = chan->completed_cookie;
        last_used = chan->cookie;
 
        ret = dma_async_is_complete(cookie, last_complete, last_used);
        if (ret != DMA_SUCCESS) {
                atc_cleanup_descriptors(atchan);
 
-               last_complete = atchan->completed_cookie;
+               last_complete = chan->completed_cookie;
                last_used = chan->cookie;
 
                ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -1129,7 +1129,7 @@ static int atc_alloc_chan_resources(struct dma_chan *chan)
        spin_lock_irqsave(&atchan->lock, flags);
        atchan->descs_allocated = i;
        list_splice(&tmp_list, &atchan->free_list);
-       atchan->completed_cookie = chan->cookie = 1;
+       chan->completed_cookie = chan->cookie = 1;
        spin_unlock_irqrestore(&atchan->lock, flags);
 
        /* channel parameters */
@@ -1329,7 +1329,7 @@ static int __init at_dma_probe(struct platform_device *pdev)
                struct at_dma_chan      *atchan = &atdma->chan[i];
 
                atchan->chan_common.device = &atdma->dma_common;
-               atchan->chan_common.cookie = atchan->completed_cookie = 1;
+               atchan->chan_common.cookie = atchan->chan_common.completed_cookie = 1;
                list_add_tail(&atchan->chan_common.device_node,
                                &atdma->dma_common.channels);
 
index a8d3277d60b5cdd238ea77959c7b40185edfc077..08fd8a0ae7978a29b836669eb3f4300b888a143e 100644 (file)
@@ -208,7 +208,6 @@ enum atc_status {
  * @save_dscr: for cyclic operations, preserve next descriptor address in
  *             the cyclic list on suspend/resume cycle
  * @lock: serializes enqueue/dequeue operations to descriptors lists
- * @completed_cookie: identifier for the most recently completed operation
  * @active_list: list of descriptors dmaengine is being running on
  * @queue: list of descriptors ready to be submitted to engine
  * @free_list: list of descriptors usable by the channel
@@ -227,7 +226,6 @@ struct at_dma_chan {
        spinlock_t              lock;
 
        /* these other elements are all protected by lock */
-       dma_cookie_t            completed_cookie;
        struct list_head        active_list;
        struct list_head        queue;
        struct list_head        free_list;
index d65a718c0f9b1ae5819aef9af4c1c58200627a22..521434bc313088a5e28a65db40e843dbc8949231 100644 (file)
@@ -59,7 +59,6 @@ struct coh901318_base {
 struct coh901318_chan {
        spinlock_t lock;
        int allocated;
-       int completed;
        int id;
        int stopped;
 
@@ -705,7 +704,7 @@ static void dma_tasklet(unsigned long data)
        callback_param = cohd_fin->desc.callback_param;
 
        /* sign this job as completed on the channel */
-       cohc->completed = cohd_fin->desc.cookie;
+       cohc->chan.completed_cookie = cohd_fin->desc.cookie;
 
        /* release the lli allocation and remove the descriptor */
        coh901318_lli_free(&cohc->base->pool, &cohd_fin->lli);
@@ -929,7 +928,7 @@ static int coh901318_alloc_chan_resources(struct dma_chan *chan)
        coh901318_config(cohc, NULL);
 
        cohc->allocated = 1;
-       cohc->completed = chan->cookie = 1;
+       chan->completed_cookie = chan->cookie = 1;
 
        spin_unlock_irqrestore(&cohc->lock, flags);
 
@@ -1169,7 +1168,7 @@ coh901318_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
        dma_cookie_t last_complete;
        int ret;
 
-       last_complete = cohc->completed;
+       last_complete = chan->completed_cookie;
        last_used = chan->cookie;
 
        ret = dma_async_is_complete(cookie, last_complete, last_used);
index 0e4b5c6a2f86449c064c176ddfefef85c8198b57..5bd23006ff4ace9f21ef2d708b81638906e6a5c9 100644 (file)
@@ -249,7 +249,7 @@ dwc_descriptor_complete(struct dw_dma_chan *dwc, struct dw_desc *desc,
        dev_vdbg(chan2dev(&dwc->chan), "descriptor %u complete\n", txd->cookie);
 
        spin_lock_irqsave(&dwc->lock, flags);
-       dwc->completed = txd->cookie;
+       dwc->chan.completed_cookie = txd->cookie;
        if (callback_required) {
                callback = txd->callback;
                param = txd->callback_param;
@@ -997,14 +997,14 @@ dwc_tx_status(struct dma_chan *chan,
        dma_cookie_t            last_complete;
        int                     ret;
 
-       last_complete = dwc->completed;
+       last_complete = chan->completed_cookie;
        last_used = chan->cookie;
 
        ret = dma_async_is_complete(cookie, last_complete, last_used);
        if (ret != DMA_SUCCESS) {
                dwc_scan_descriptors(to_dw_dma(chan->device), dwc);
 
-               last_complete = dwc->completed;
+               last_complete = chan->completed_cookie;
                last_used = chan->cookie;
 
                ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -1046,7 +1046,7 @@ static int dwc_alloc_chan_resources(struct dma_chan *chan)
                return -EIO;
        }
 
-       dwc->completed = chan->cookie = 1;
+       chan->completed_cookie = chan->cookie = 1;
 
        /*
         * NOTE: some controllers may have additional features that we
@@ -1474,7 +1474,7 @@ static int __init dw_probe(struct platform_device *pdev)
                struct dw_dma_chan      *dwc = &dw->chan[i];
 
                dwc->chan.device = &dw->dma;
-               dwc->chan.cookie = dwc->completed = 1;
+               dwc->chan.cookie = dwc->chan.completed_cookie = 1;
                if (pdata->chan_allocation_order == CHAN_ALLOCATION_ASCENDING)
                        list_add_tail(&dwc->chan.device_node,
                                        &dw->dma.channels);
index eec0481a12f7d767fee23c9743abd7be5968da87..f298f69ecbf997959235f5f620087917b23a023c 100644 (file)
@@ -158,7 +158,6 @@ struct dw_dma_chan {
 
        /* these other elements are all protected by lock */
        unsigned long           flags;
-       dma_cookie_t            completed;
        struct list_head        active_list;
        struct list_head        queue;
        struct list_head        free_list;
index 59e7a965772bfdff900aa1d82063d6f2510dd8c4..bc457878cffd18cb6d028dd5ff93b2ecceba7b94 100644 (file)
@@ -122,7 +122,6 @@ struct ep93xx_dma_desc {
  * @lock: lock protecting the fields following
  * @flags: flags for the channel
  * @buffer: which buffer to use next (0/1)
- * @last_completed: last completed cookie value
  * @active: flattened chain of descriptors currently being processed
  * @queue: pending descriptors which are handled next
  * @free_list: list of free descriptors which can be used
@@ -157,7 +156,6 @@ struct ep93xx_dma_chan {
 #define EP93XX_DMA_IS_CYCLIC           0
 
        int                             buffer;
-       dma_cookie_t                    last_completed;
        struct list_head                active;
        struct list_head                queue;
        struct list_head                free_list;
@@ -703,7 +701,7 @@ static void ep93xx_dma_tasklet(unsigned long data)
        desc = ep93xx_dma_get_active(edmac);
        if (desc) {
                if (desc->complete) {
-                       edmac->last_completed = desc->txd.cookie;
+                       edmac->chan.completed_cookie = desc->txd.cookie;
                        list_splice_init(&edmac->active, &list);
                }
                callback = desc->txd.callback;
@@ -861,7 +859,7 @@ static int ep93xx_dma_alloc_chan_resources(struct dma_chan *chan)
                goto fail_clk_disable;
 
        spin_lock_irq(&edmac->lock);
-       edmac->last_completed = 1;
+       edmac->chan.completed_cookie = 1;
        edmac->chan.cookie = 1;
        ret = edmac->edma->hw_setup(edmac);
        spin_unlock_irq(&edmac->lock);
@@ -1254,7 +1252,7 @@ static enum dma_status ep93xx_dma_tx_status(struct dma_chan *chan,
 
        spin_lock_irqsave(&edmac->lock, flags);
        last_used = chan->cookie;
-       last_completed = edmac->last_completed;
+       last_completed = chan->completed_cookie;
        spin_unlock_irqrestore(&edmac->lock, flags);
 
        ret = dma_async_is_complete(cookie, last_completed, last_used);
index b98070c33ca9d3b8aa42d1fb5085da9772957733..9b5cb8a43cfaae2af82ba52c02e3dddcc344d0ec 100644 (file)
@@ -990,7 +990,7 @@ static enum dma_status fsl_tx_status(struct dma_chan *dchan,
 
        spin_lock_irqsave(&chan->desc_lock, flags);
 
-       last_complete = chan->completed_cookie;
+       last_complete = dchan->completed_cookie;
        last_used = dchan->cookie;
 
        spin_unlock_irqrestore(&chan->desc_lock, flags);
@@ -1088,7 +1088,7 @@ static void dma_do_tasklet(unsigned long data)
                desc = to_fsl_desc(chan->ld_running.prev);
                cookie = desc->async_tx.cookie;
 
-               chan->completed_cookie = cookie;
+               chan->common.completed_cookie = cookie;
                chan_dbg(chan, "completed_cookie=%d\n", cookie);
        }
 
index 9cb5aa57c677ea982339a87bc21df0a8e4d679e0..f5c38791fc7466f5d683b2ee49e718d8c29d5ca6 100644 (file)
@@ -137,7 +137,6 @@ struct fsldma_device {
 struct fsldma_chan {
        char name[8];                   /* Channel name */
        struct fsldma_chan_regs __iomem *regs;
-       dma_cookie_t completed_cookie;  /* The maximum cookie completed */
        spinlock_t desc_lock;           /* Descriptor operation lock */
        struct list_head ld_pending;    /* Link descriptors queue */
        struct list_head ld_running;    /* Link descriptors queue */
index 3296a7337f25d972f436a8932fd306149438e4ea..d3ddcba87f81b9d333afbe3082985029baa0d2cf 100644 (file)
@@ -41,7 +41,6 @@ struct imxdma_channel {
        struct dma_chan                 chan;
        spinlock_t                      lock;
        struct dma_async_tx_descriptor  desc;
-       dma_cookie_t                    last_completed;
        enum dma_status                 status;
        int                             dma_request;
        struct scatterlist              *sg_list;
@@ -65,7 +64,7 @@ static void imxdma_handle(struct imxdma_channel *imxdmac)
 {
        if (imxdmac->desc.callback)
                imxdmac->desc.callback(imxdmac->desc.callback_param);
-       imxdmac->last_completed = imxdmac->desc.cookie;
+       imxdmac->chan.completed_cookie = imxdmac->desc.cookie;
 }
 
 static void imxdma_irq_handler(int channel, void *data)
@@ -158,8 +157,8 @@ static enum dma_status imxdma_tx_status(struct dma_chan *chan,
 
        last_used = chan->cookie;
 
-       ret = dma_async_is_complete(cookie, imxdmac->last_completed, last_used);
-       dma_set_tx_state(txstate, imxdmac->last_completed, last_used, 0);
+       ret = dma_async_is_complete(cookie, chan->completed_cookie, last_used);
+       dma_set_tx_state(txstate, chan->completed_cookie, last_used, 0);
 
        return ret;
 }
index bf736ad679ca74b75433046459202340e67e2a3f..49aa4e876645f622e62a41ad9ab0b835b20e08bf 100644 (file)
@@ -267,7 +267,6 @@ struct sdma_channel {
        struct dma_chan                 chan;
        spinlock_t                      lock;
        struct dma_async_tx_descriptor  desc;
-       dma_cookie_t                    last_completed;
        enum dma_status                 status;
        unsigned int                    chn_count;
        unsigned int                    chn_real_count;
@@ -529,7 +528,7 @@ static void mxc_sdma_handle_channel_normal(struct sdma_channel *sdmac)
        else
                sdmac->status = DMA_SUCCESS;
 
-       sdmac->last_completed = sdmac->desc.cookie;
+       sdmac->chan.completed_cookie = sdmac->desc.cookie;
        if (sdmac->desc.callback)
                sdmac->desc.callback(sdmac->desc.callback_param);
 }
@@ -1127,7 +1126,7 @@ static enum dma_status sdma_tx_status(struct dma_chan *chan,
 
        last_used = chan->cookie;
 
-       dma_set_tx_state(txstate, sdmac->last_completed, last_used,
+       dma_set_tx_state(txstate, chan->completed_cookie, last_used,
                        sdmac->chn_count - sdmac->chn_real_count);
 
        return sdmac->status;
index 923476d74a5d206fcf497ba43a2471446c26c7b5..40e47e6c7ed8d94d902ddd154b41b757a7c05a7c 100644 (file)
@@ -288,7 +288,7 @@ static void midc_descriptor_complete(struct intel_mid_dma_chan *midc,
        struct intel_mid_dma_lli        *llitem;
        void *param_txd = NULL;
 
-       midc->completed = txd->cookie;
+       midc->chan.completed_cookie = txd->cookie;
        callback_txd = txd->callback;
        param_txd = txd->callback_param;
 
@@ -482,12 +482,11 @@ static enum dma_status intel_mid_dma_tx_status(struct dma_chan *chan,
                                                dma_cookie_t cookie,
                                                struct dma_tx_state *txstate)
 {
-       struct intel_mid_dma_chan       *midc = to_intel_mid_dma_chan(chan);
        dma_cookie_t            last_used;
        dma_cookie_t            last_complete;
        int                             ret;
 
-       last_complete = midc->completed;
+       last_complete = chan->completed_cookie;
        last_used = chan->cookie;
 
        ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -496,7 +495,7 @@ static enum dma_status intel_mid_dma_tx_status(struct dma_chan *chan,
                midc_scan_descriptors(to_middma_device(chan->device), midc);
                spin_unlock_bh(&midc->lock);
 
-               last_complete = midc->completed;
+               last_complete = chan->completed_cookie;
                last_used = chan->cookie;
 
                ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -886,7 +885,7 @@ static int intel_mid_dma_alloc_chan_resources(struct dma_chan *chan)
                pm_runtime_put(&mid->pdev->dev);
                return -EIO;
        }
-       midc->completed = chan->cookie = 1;
+       chan->completed_cookie = chan->cookie = 1;
 
        spin_lock_bh(&midc->lock);
        while (midc->descs_allocated < DESCS_PER_CHANNEL) {
index c83d35b97bd8e38a91330854c3d8b10acbe4cedf..1bfa9268feafebb944a7eb32c203d29ca8097afb 100644 (file)
@@ -165,7 +165,6 @@ union intel_mid_dma_cfg_hi {
  * @dma_base: MMIO register space DMA engine base pointer
  * @ch_id: DMA channel id
  * @lock: channel spinlock
- * @completed: DMA cookie
  * @active_list: current active descriptors
  * @queue: current queued up descriptors
  * @free_list: current free descriptors
@@ -183,7 +182,6 @@ struct intel_mid_dma_chan {
        void __iomem            *dma_base;
        int                     ch_id;
        spinlock_t              lock;
-       dma_cookie_t            completed;
        struct list_head        active_list;
        struct list_head        queue;
        struct list_head        free_list;
index a4d6cb0c0343a32c166f3003f65378e5a31da7f1..fab440af1f9abb5227e327e1936e0c06c1898ef6 100644 (file)
@@ -603,7 +603,7 @@ static void __cleanup(struct ioat_dma_chan *ioat, unsigned long phys_complete)
                 */
                dump_desc_dbg(ioat, desc);
                if (tx->cookie) {
-                       chan->completed_cookie = tx->cookie;
+                       chan->common.completed_cookie = tx->cookie;
                        tx->cookie = 0;
                        ioat_dma_unmap(chan, tx->flags, desc->len, desc->hw);
                        ioat->active -= desc->hw->tx_cnt;
index 5216c8a92a21327d9787e0dc39de885bbc8f8acb..9653b6b6a715e0f671f91655d0e1dffcfeb64dc4 100644 (file)
@@ -90,7 +90,6 @@ struct ioat_chan_common {
        void __iomem *reg_base;
        unsigned long last_completion;
        spinlock_t cleanup_lock;
-       dma_cookie_t completed_cookie;
        unsigned long state;
        #define IOAT_COMPLETION_PENDING 0
        #define IOAT_COMPLETION_ACK 1
@@ -153,12 +152,11 @@ static inline enum dma_status
 ioat_tx_status(struct dma_chan *c, dma_cookie_t cookie,
                 struct dma_tx_state *txstate)
 {
-       struct ioat_chan_common *chan = to_chan_common(c);
        dma_cookie_t last_used;
        dma_cookie_t last_complete;
 
        last_used = c->cookie;
-       last_complete = chan->completed_cookie;
+       last_complete = c->completed_cookie;
 
        dma_set_tx_state(txstate, last_complete, last_used, 0);
 
index 5d65f8377971d697a0452988a59c5bb35639ba8e..d3f0aff2c02a91ac4e068a2fbc7886deb4630e97 100644 (file)
@@ -147,7 +147,7 @@ static void __cleanup(struct ioat2_dma_chan *ioat, unsigned long phys_complete)
                dump_desc_dbg(ioat, desc);
                if (tx->cookie) {
                        ioat_dma_unmap(chan, tx->flags, desc->len, desc->hw);
-                       chan->completed_cookie = tx->cookie;
+                       chan->common.completed_cookie = tx->cookie;
                        tx->cookie = 0;
                        if (tx->callback) {
                                tx->callback(tx->callback_param);
index f519c93a61e78c4778afeebe7984c4b45a44acc3..d4afac741e8a53efd85c70e0ea0dcecbec3c7af3 100644 (file)
@@ -277,7 +277,7 @@ static void __cleanup(struct ioat2_dma_chan *ioat, unsigned long phys_complete)
                dump_desc_dbg(ioat, desc);
                tx = &desc->txd;
                if (tx->cookie) {
-                       chan->completed_cookie = tx->cookie;
+                       chan->common.completed_cookie = tx->cookie;
                        ioat3_dma_unmap(ioat, desc, idx + i);
                        tx->cookie = 0;
                        if (tx->callback) {
index 04be90b645b839e929512032a234089cfe2d082c..d8027c2b42c053bd7853646c1fbbe2bf18bd9789 100644 (file)
@@ -317,7 +317,7 @@ static void __iop_adma_slot_cleanup(struct iop_adma_chan *iop_chan)
        }
 
        if (cookie > 0) {
-               iop_chan->completed_cookie = cookie;
+               iop_chan->common.completed_cookie = cookie;
                pr_debug("\tcompleted cookie %d\n", cookie);
        }
 }
@@ -909,7 +909,7 @@ static enum dma_status iop_adma_status(struct dma_chan *chan,
        enum dma_status ret;
 
        last_used = chan->cookie;
-       last_complete = iop_chan->completed_cookie;
+       last_complete = chan->completed_cookie;
        dma_set_tx_state(txstate, last_complete, last_used, 0);
        ret = dma_async_is_complete(cookie, last_complete, last_used);
        if (ret == DMA_SUCCESS)
@@ -918,7 +918,7 @@ static enum dma_status iop_adma_status(struct dma_chan *chan,
        iop_adma_slot_cleanup(iop_chan);
 
        last_used = chan->cookie;
-       last_complete = iop_chan->completed_cookie;
+       last_complete = chan->completed_cookie;
        dma_set_tx_state(txstate, last_complete, last_used, 0);
 
        return dma_async_is_complete(cookie, last_complete, last_used);
@@ -1650,7 +1650,7 @@ static void iop_chan_start_null_memcpy(struct iop_adma_chan *iop_chan)
                /* initialize the completed cookie to be less than
                 * the most recently used cookie
                 */
-               iop_chan->completed_cookie = cookie - 1;
+               iop_chan->common.completed_cookie = cookie - 1;
                iop_chan->common.cookie = sw_desc->async_tx.cookie = cookie;
 
                /* channel should not be busy */
@@ -1707,7 +1707,7 @@ static void iop_chan_start_null_xor(struct iop_adma_chan *iop_chan)
                /* initialize the completed cookie to be less than
                 * the most recently used cookie
                 */
-               iop_chan->completed_cookie = cookie - 1;
+               iop_chan->common.completed_cookie = cookie - 1;
                iop_chan->common.cookie = sw_desc->async_tx.cookie = cookie;
 
                /* channel should not be busy */
index 6212b16e8cf21ea32ae05732ae1f3b1147b134b8..9149ade6a5d9ee0602df632174d988d309931e63 100644 (file)
@@ -1295,7 +1295,7 @@ static irqreturn_t idmac_interrupt(int irq, void *dev_id)
        /* Flip the active buffer - even if update above failed */
        ichan->active_buffer = !ichan->active_buffer;
        if (done)
-               ichan->completed = desc->txd.cookie;
+               ichan->dma_chan.completed_cookie = desc->txd.cookie;
 
        callback = desc->txd.callback;
        callback_param = desc->txd.callback_param;
@@ -1511,7 +1511,7 @@ static int idmac_alloc_chan_resources(struct dma_chan *chan)
        WARN_ON(ichan->status != IPU_CHANNEL_FREE);
 
        chan->cookie            = 1;
-       ichan->completed        = -ENXIO;
+       chan->completed_cookie  = -ENXIO;
 
        ret = ipu_irq_map(chan->chan_id);
        if (ret < 0)
@@ -1600,9 +1600,7 @@ static void idmac_free_chan_resources(struct dma_chan *chan)
 static enum dma_status idmac_tx_status(struct dma_chan *chan,
                       dma_cookie_t cookie, struct dma_tx_state *txstate)
 {
-       struct idmac_channel *ichan = to_idmac_chan(chan);
-
-       dma_set_tx_state(txstate, ichan->completed, chan->cookie, 0);
+       dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie, 0);
        if (cookie != chan->cookie)
                return DMA_ERROR;
        return DMA_SUCCESS;
@@ -1638,11 +1636,11 @@ static int __init ipu_idmac_init(struct ipu *ipu)
 
                ichan->status           = IPU_CHANNEL_FREE;
                ichan->sec_chan_en      = false;
-               ichan->completed        = -ENXIO;
                snprintf(ichan->eof_name, sizeof(ichan->eof_name), "IDMAC EOF %d", i);
 
                dma_chan->device        = &idmac->dma;
                dma_chan->cookie        = 1;
+               dma_chan->completed_cookie      = -ENXIO;
                dma_chan->chan_id       = i;
                list_add_tail(&dma_chan->device_node, &dma->channels);
        }
index 4d6d4cf669496ff0afc65d5dee450452b143a2c6..39a5cde9f42824af5d0c0fc47351d7de2dcb5cfa 100644 (file)
@@ -188,7 +188,6 @@ struct mpc_dma_chan {
        struct list_head                completed;
        struct mpc_dma_tcd              *tcd;
        dma_addr_t                      tcd_paddr;
-       dma_cookie_t                    completed_cookie;
 
        /* Lock for this structure */
        spinlock_t                      lock;
@@ -365,7 +364,7 @@ static void mpc_dma_process_completed(struct mpc_dma *mdma)
                /* Free descriptors */
                spin_lock_irqsave(&mchan->lock, flags);
                list_splice_tail_init(&list, &mchan->free);
-               mchan->completed_cookie = last_cookie;
+               mchan->chan.completed_cookie = last_cookie;
                spin_unlock_irqrestore(&mchan->lock, flags);
        }
 }
@@ -568,7 +567,7 @@ mpc_dma_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
 
        spin_lock_irqsave(&mchan->lock, flags);
        last_used = mchan->chan.cookie;
-       last_complete = mchan->completed_cookie;
+       last_complete = mchan->chan.completed_cookie;
        spin_unlock_irqrestore(&mchan->lock, flags);
 
        dma_set_tx_state(txstate, last_complete, last_used, 0);
@@ -742,7 +741,7 @@ static int __devinit mpc_dma_probe(struct platform_device *op)
 
                mchan->chan.device = dma;
                mchan->chan.cookie = 1;
-               mchan->completed_cookie = mchan->chan.cookie;
+               mchan->chan.completed_cookie = mchan->chan.cookie;
 
                INIT_LIST_HEAD(&mchan->free);
                INIT_LIST_HEAD(&mchan->prepared);
index ad7d03fe4cb49c4a8d5c352e290fd95000ff8d57..c6a84dac112c8201133e9471745294e7d4751c2f 100644 (file)
@@ -435,7 +435,7 @@ static void __mv_xor_slot_cleanup(struct mv_xor_chan *mv_chan)
        }
 
        if (cookie > 0)
-               mv_chan->completed_cookie = cookie;
+               mv_chan->common.completed_cookie = cookie;
 }
 
 static void
@@ -825,7 +825,7 @@ static enum dma_status mv_xor_status(struct dma_chan *chan,
        enum dma_status ret;
 
        last_used = chan->cookie;
-       last_complete = mv_chan->completed_cookie;
+       last_complete = chan->completed_cookie;
        dma_set_tx_state(txstate, last_complete, last_used, 0);
 
        ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -836,7 +836,7 @@ static enum dma_status mv_xor_status(struct dma_chan *chan,
        mv_xor_slot_cleanup(mv_chan);
 
        last_used = chan->cookie;
-       last_complete = mv_chan->completed_cookie;
+       last_complete = chan->completed_cookie;
 
        dma_set_tx_state(txstate, last_complete, last_used, 0);
        return dma_async_is_complete(cookie, last_complete, last_used);
index da04ac23def36bb09b0e0108d952e51000d767ad..654876b7ba1deae84a06f89cdf617b153d4315ef 100644 (file)
@@ -78,7 +78,6 @@ struct mv_xor_device {
 /**
  * struct mv_xor_chan - internal representation of a XOR channel
  * @pending: allows batching of hardware operations
- * @completed_cookie: identifier for the most recently completed operation
  * @lock: serializes enqueue/dequeue operations to the descriptors pool
  * @mmr_base: memory mapped register base
  * @idx: the index of the xor channel
@@ -93,7 +92,6 @@ struct mv_xor_device {
  */
 struct mv_xor_chan {
        int                     pending;
-       dma_cookie_t            completed_cookie;
        spinlock_t              lock; /* protects the descriptor slot pool */
        void __iomem            *mmr_base;
        unsigned int            idx;
index b06cd4ca626fb4fd93d5ab3b7fedddbfd6ea6c25..3696e6e4143aac041bb2c140fbae0a1352e4fd27 100644 (file)
@@ -111,7 +111,6 @@ struct mxs_dma_chan {
        struct mxs_dma_ccw              *ccw;
        dma_addr_t                      ccw_phys;
        int                             desc_count;
-       dma_cookie_t                    last_completed;
        enum dma_status                 status;
        unsigned int                    flags;
 #define MXS_DMA_SG_LOOP                        (1 << 0)
@@ -274,7 +273,7 @@ static irqreturn_t mxs_dma_int_handler(int irq, void *dev_id)
                stat1 &= ~(1 << channel);
 
                if (mxs_chan->status == DMA_SUCCESS)
-                       mxs_chan->last_completed = mxs_chan->desc.cookie;
+                       mxs_chan->chan.completed_cookie = mxs_chan->desc.cookie;
 
                /* schedule tasklet on this channel */
                tasklet_schedule(&mxs_chan->tasklet);
@@ -538,7 +537,7 @@ static enum dma_status mxs_dma_tx_status(struct dma_chan *chan,
        dma_cookie_t last_used;
 
        last_used = chan->cookie;
-       dma_set_tx_state(txstate, mxs_chan->last_completed, last_used, 0);
+       dma_set_tx_state(txstate, chan->completed_cookie, last_used, 0);
 
        return mxs_chan->status;
 }
index 823f58179f9d46a8a169dbbaf7551b1d91ec5f28..79a71858497ca22c17d0ab70e83351b5629592ca 100644 (file)
@@ -105,7 +105,6 @@ struct pch_dma_chan {
 
        spinlock_t              lock;
 
-       dma_cookie_t            completed_cookie;
        struct list_head        active_list;
        struct list_head        queue;
        struct list_head        free_list;
@@ -544,7 +543,7 @@ static int pd_alloc_chan_resources(struct dma_chan *chan)
        spin_lock_irq(&pd_chan->lock);
        list_splice(&tmp_list, &pd_chan->free_list);
        pd_chan->descs_allocated = i;
-       pd_chan->completed_cookie = chan->cookie = 1;
+       chan->completed_cookie = chan->cookie = 1;
        spin_unlock_irq(&pd_chan->lock);
 
        pdc_enable_irq(chan, 1);
@@ -583,7 +582,7 @@ static enum dma_status pd_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
        int ret;
 
        spin_lock_irq(&pd_chan->lock);
-       last_completed = pd_chan->completed_cookie;
+       last_completed = chan->completed_cookie;
        last_used = chan->cookie;
        spin_unlock_irq(&pd_chan->lock);
 
index 84ebea9bc53a785e0739af5eff0fa5a388754edc..99c31a76e74efa086747ed5d9bf72fab499d1f59 100644 (file)
@@ -51,9 +51,6 @@ struct dma_pl330_chan {
        /* DMA-Engine Channel */
        struct dma_chan chan;
 
-       /* Last completed cookie */
-       dma_cookie_t completed;
-
        /* List of to be xfered descriptors */
        struct list_head work_list;
 
@@ -234,7 +231,7 @@ static void pl330_tasklet(unsigned long data)
        /* Pick up ripe tomatoes */
        list_for_each_entry_safe(desc, _dt, &pch->work_list, node)
                if (desc->status == DONE) {
-                       pch->completed = desc->txd.cookie;
+                       pch->chan.completed_cookie = desc->txd.cookie;
                        list_move_tail(&desc->node, &list);
                }
 
@@ -305,7 +302,7 @@ static int pl330_alloc_chan_resources(struct dma_chan *chan)
 
        spin_lock_irqsave(&pch->lock, flags);
 
-       pch->completed = chan->cookie = 1;
+       chan->completed_cookie = chan->cookie = 1;
        pch->cyclic = false;
 
        pch->pl330_chid = pl330_request_channel(&pdmac->pif);
@@ -400,7 +397,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
        dma_cookie_t last_done, last_used;
        int ret;
 
-       last_done = pch->completed;
+       last_done = chan->completed_cookie;
        last_used = chan->cookie;
 
        ret = dma_async_is_complete(cookie, last_done, last_used);
index fc457a7e8832dc8f29ed4055cc781369de4ef7aa..f878322ecbcbe870746cf6fd7c52fd1c90bed069 100644 (file)
@@ -1930,7 +1930,7 @@ static void __ppc440spe_adma_slot_cleanup(struct ppc440spe_adma_chan *chan)
                                if (end_of_chain && slot_cnt) {
                                        /* Should wait for ZeroSum completion */
                                        if (cookie > 0)
-                                               chan->completed_cookie = cookie;
+                                               chan->common.completed_cookie = cookie;
                                        return;
                                }
 
@@ -1960,7 +1960,7 @@ static void __ppc440spe_adma_slot_cleanup(struct ppc440spe_adma_chan *chan)
        BUG_ON(!seen_current);
 
        if (cookie > 0) {
-               chan->completed_cookie = cookie;
+               chan->common.completed_cookie = cookie;
                pr_debug("\tcompleted cookie %d\n", cookie);
        }
 
@@ -3950,7 +3950,7 @@ static enum dma_status ppc440spe_adma_tx_status(struct dma_chan *chan,
 
        ppc440spe_chan = to_ppc440spe_adma_chan(chan);
        last_used = chan->cookie;
-       last_complete = ppc440spe_chan->completed_cookie;
+       last_complete = chan->completed_cookie;
 
        dma_set_tx_state(txstate, last_complete, last_used, 0);
 
@@ -3961,7 +3961,7 @@ static enum dma_status ppc440spe_adma_tx_status(struct dma_chan *chan,
        ppc440spe_adma_slot_cleanup(ppc440spe_chan);
 
        last_used = chan->cookie;
-       last_complete = ppc440spe_chan->completed_cookie;
+       last_complete = chan->completed_cookie;
 
        dma_set_tx_state(txstate, last_complete, last_used, 0);
 
@@ -4058,7 +4058,7 @@ static void ppc440spe_chan_start_null_xor(struct ppc440spe_adma_chan *chan)
                /* initialize the completed cookie to be less than
                 * the most recently used cookie
                 */
-               chan->completed_cookie = cookie - 1;
+               chan->common.completed_cookie = cookie - 1;
                chan->common.cookie = sw_desc->async_tx.cookie = cookie;
 
                /* channel should not be busy */
index 8ada5a812e3b4a94a57252d65abfa0950171787e..26b7a5ed9ac7ee0171e1dd90e9c96608107b29e6 100644 (file)
@@ -81,7 +81,6 @@ struct ppc440spe_adma_device {
  * @common: common dmaengine channel object members
  * @all_slots: complete domain of slots usable by the channel
  * @pending: allows batching of hardware operations
- * @completed_cookie: identifier for the most recently completed operation
  * @slots_allocated: records the actual size of the descriptor slot pool
  * @hw_chain_inited: h/w descriptor chain initialization flag
  * @irq_tasklet: bottom half where ppc440spe_adma_slot_cleanup runs
@@ -99,7 +98,6 @@ struct ppc440spe_adma_chan {
        struct list_head all_slots;
        struct ppc440spe_adma_desc_slot *last_used;
        int pending;
-       dma_cookie_t completed_cookie;
        int slots_allocated;
        int hw_chain_inited;
        struct tasklet_struct irq_tasklet;
index 812fd76e9c18e4b2b210f20125324560a873ddeb..ae84c12e3865fa5b3537026215d570950ccb68bb 100644 (file)
@@ -764,12 +764,12 @@ static dma_async_tx_callback __ld_cleanup(struct sh_dmae_chan *sh_chan, bool all
                        cookie = tx->cookie;
 
                if (desc->mark == DESC_COMPLETED && desc->chunks == 1) {
-                       if (sh_chan->completed_cookie != desc->cookie - 1)
+                       if (sh_chan->common.completed_cookie != desc->cookie - 1)
                                dev_dbg(sh_chan->dev,
                                        "Completing cookie %d, expected %d\n",
                                        desc->cookie,
-                                       sh_chan->completed_cookie + 1);
-                       sh_chan->completed_cookie = desc->cookie;
+                                       sh_chan->common.completed_cookie + 1);
+                       sh_chan->common.completed_cookie = desc->cookie;
                }
 
                /* Call callback on the last chunk */
@@ -823,7 +823,7 @@ static dma_async_tx_callback __ld_cleanup(struct sh_dmae_chan *sh_chan, bool all
                 * Terminating and the loop completed normally: forgive
                 * uncompleted cookies
                 */
-               sh_chan->completed_cookie = sh_chan->common.cookie;
+               sh_chan->common.completed_cookie = sh_chan->common.cookie;
 
        spin_unlock_irqrestore(&sh_chan->desc_lock, flags);
 
@@ -891,7 +891,7 @@ static enum dma_status sh_dmae_tx_status(struct dma_chan *chan,
        sh_dmae_chan_ld_cleanup(sh_chan, false);
 
        /* First read completed cookie to avoid a skew */
-       last_complete = sh_chan->completed_cookie;
+       last_complete = chan->completed_cookie;
        rmb();
        last_used = chan->cookie;
        BUG_ON(last_complete < 0);
index 2b55a276dc5bd60503aa1d740c5451dc594f4eff..0b1d2c105f027c5a45de636bef665f321bb46968 100644 (file)
@@ -30,7 +30,6 @@ enum dmae_pm_state {
 };
 
 struct sh_dmae_chan {
-       dma_cookie_t completed_cookie;  /* The maximum cookie completed */
        spinlock_t desc_lock;           /* Descriptor operation lock */
        struct list_head ld_queue;      /* Link descriptors queue */
        struct list_head ld_free;       /* Link descriptors free */
index 2333810d1688c369f232eb6d08ee7bd17dcd0f03..60473f00cf1c2b7d476fe141b06d6b7c8bc8b859 100644 (file)
@@ -59,7 +59,6 @@ struct sirfsoc_dma_chan {
        struct list_head                queued;
        struct list_head                active;
        struct list_head                completed;
-       dma_cookie_t                    completed_cookie;
        unsigned long                   happened_cyclic;
        unsigned long                   completed_cyclic;
 
@@ -208,7 +207,7 @@ static void sirfsoc_dma_process_completed(struct sirfsoc_dma *sdma)
                        /* Free descriptors */
                        spin_lock_irqsave(&schan->lock, flags);
                        list_splice_tail_init(&list, &schan->free);
-                       schan->completed_cookie = last_cookie;
+                       schan->chan.completed_cookie = last_cookie;
                        spin_unlock_irqrestore(&schan->lock, flags);
                } else {
                        /* for cyclic channel, desc is always in active list */
@@ -419,7 +418,7 @@ sirfsoc_dma_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
 
        spin_lock_irqsave(&schan->lock, flags);
        last_used = schan->chan.cookie;
-       last_complete = schan->completed_cookie;
+       last_complete = schan->chan.completed_cookie;
        spin_unlock_irqrestore(&schan->lock, flags);
 
        dma_set_tx_state(txstate, last_complete, last_used, 0);
@@ -636,7 +635,7 @@ static int __devinit sirfsoc_dma_probe(struct platform_device *op)
 
                schan->chan.device = dma;
                schan->chan.cookie = 1;
-               schan->completed_cookie = schan->chan.cookie;
+               schan->chan.completed_cookie = schan->chan.cookie;
 
                INIT_LIST_HEAD(&schan->free);
                INIT_LIST_HEAD(&schan->prepared);
index cc5ecbc067a3d8a8d88c97190b0248fb0851593b..cfca2a06d1af986b307c463f97fa95de1d29ccb3 100644 (file)
@@ -220,8 +220,6 @@ struct d40_base;
  *
  * @lock: A spinlock to protect this struct.
  * @log_num: The logical number, if any of this channel.
- * @completed: Starts with 1, after first interrupt it is set to dma engine's
- * current cookie.
  * @pending_tx: The number of pending transfers. Used between interrupt handler
  * and tasklet.
  * @busy: Set to true when transfer is ongoing on this channel.
@@ -250,8 +248,6 @@ struct d40_base;
 struct d40_chan {
        spinlock_t                       lock;
        int                              log_num;
-       /* ID of the most recent completed transfer */
-       int                              completed;
        int                              pending_tx;
        bool                             busy;
        struct d40_phy_res              *phy_chan;
@@ -1357,7 +1353,7 @@ static void dma_tasklet(unsigned long data)
                goto err;
 
        if (!d40d->cyclic)
-               d40c->completed = d40d->txd.cookie;
+               d40c->chan.completed_cookie = d40d->txd.cookie;
 
        /*
         * If terminating a channel pending_tx is set to zero.
@@ -2182,7 +2178,7 @@ static int d40_alloc_chan_resources(struct dma_chan *chan)
        bool is_free_phy;
        spin_lock_irqsave(&d40c->lock, flags);
 
-       d40c->completed = chan->cookie = 1;
+       chan->completed_cookie = chan->cookie = 1;
 
        /* If no dma configuration is set use default configuration (memcpy) */
        if (!d40c->configured) {
@@ -2351,7 +2347,7 @@ static enum dma_status d40_tx_status(struct dma_chan *chan,
                return -EINVAL;
        }
 
-       last_complete = d40c->completed;
+       last_complete = chan->completed_cookie;
        last_used = chan->cookie;
 
        if (d40_is_paused(d40c))
index a6f9c1684a0fc1dc4a9c7a2dbd2407fe6252b68d..a1d15598cf7edff1a311f9e8fd55469e7e979979 100644 (file)
@@ -84,7 +84,6 @@ struct timb_dma_chan {
                                        especially the lists and descriptors,
                                        from races between the tasklet and calls
                                        from above */
-       dma_cookie_t            last_completed_cookie;
        bool                    ongoing;
        struct list_head        active_list;
        struct list_head        queue;
@@ -284,7 +283,7 @@ static void __td_finish(struct timb_dma_chan *td_chan)
        else
                iowrite32(0, td_chan->membase + TIMBDMA_OFFS_TX_DLAR);
 */
-       td_chan->last_completed_cookie = txd->cookie;
+       td_chan->chan.completed_cookie = txd->cookie;
        td_chan->ongoing = false;
 
        callback = txd->callback;
@@ -481,7 +480,7 @@ static int td_alloc_chan_resources(struct dma_chan *chan)
        }
 
        spin_lock_bh(&td_chan->lock);
-       td_chan->last_completed_cookie = 1;
+       chan->completed_cookie = 1;
        chan->cookie = 1;
        spin_unlock_bh(&td_chan->lock);
 
@@ -523,7 +522,7 @@ static enum dma_status td_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
 
        dev_dbg(chan2dev(chan), "%s: Entry\n", __func__);
 
-       last_complete = td_chan->last_completed_cookie;
+       last_complete = chan->completed_cookie;
        last_used = chan->cookie;
 
        ret = dma_async_is_complete(cookie, last_complete, last_used);
index 6122c364cf11bb0050fb2b029c083b3c40233722..a917b6723bad1ae2abb4f6d559021f2c641f1ba8 100644 (file)
@@ -424,7 +424,7 @@ txx9dmac_descriptor_complete(struct txx9dmac_chan *dc,
        dev_vdbg(chan2dev(&dc->chan), "descriptor %u %p complete\n",
                 txd->cookie, desc);
 
-       dc->completed = txd->cookie;
+       dc->chan.completed_cookie = txd->cookie;
        callback = txd->callback;
        param = txd->callback_param;
 
@@ -976,7 +976,7 @@ txx9dmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
        dma_cookie_t last_complete;
        int ret;
 
-       last_complete = dc->completed;
+       last_complete = chan->completed_cookie;
        last_used = chan->cookie;
 
        ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -985,7 +985,7 @@ txx9dmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
                txx9dmac_scan_descriptors(dc);
                spin_unlock_bh(&dc->lock);
 
-               last_complete = dc->completed;
+               last_complete = chan->completed_cookie;
                last_used = chan->cookie;
 
                ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -1057,7 +1057,7 @@ static int txx9dmac_alloc_chan_resources(struct dma_chan *chan)
                return -EIO;
        }
 
-       dc->completed = chan->cookie = 1;
+       chan->completed_cookie = chan->cookie = 1;
 
        dc->ccr = TXX9_DMA_CCR_IMMCHN | TXX9_DMA_CCR_INTENE | CCR_LE;
        txx9dmac_chan_set_SMPCHN(dc);
@@ -1186,7 +1186,7 @@ static int __init txx9dmac_chan_probe(struct platform_device *pdev)
        dc->ddev->chan[ch] = dc;
        dc->chan.device = &dc->dma;
        list_add_tail(&dc->chan.device_node, &dc->chan.device->channels);
-       dc->chan.cookie = dc->completed = 1;
+       dc->chan.cookie = dc->chan.completed_cookie = 1;
 
        if (is_dmac64(dc))
                dc->ch_regs = &__txx9dmac_regs(dc->ddev)->CHAN[ch];
index 365d42366b9f15e237833ace8530e1f4e78e1a21..f5a760598882499ff73174ffcb2b5b486606056d 100644 (file)
@@ -172,7 +172,6 @@ struct txx9dmac_chan {
        spinlock_t              lock;
 
        /* these other elements are all protected by lock */
-       dma_cookie_t            completed;
        struct list_head        active_list;
        struct list_head        queue;
        struct list_head        free_list;
index 2c58853ca42372aad51848e67e1feb55a63ce861..e64ce2cfee9959f5b231b879d3afef2b5abd57cc 100644 (file)
@@ -172,7 +172,6 @@ enum pl08x_dma_chan_state {
  * @runtime_addr: address for RX/TX according to the runtime config
  * @runtime_direction: current direction of this channel according to
  * runtime config
- * @lc: last completed transaction on this channel
  * @pend_list: queued transactions pending on this channel
  * @at: active transaction on this channel
  * @lock: a lock for this channel data
@@ -197,7 +196,6 @@ struct pl08x_dma_chan {
        u32 src_cctl;
        u32 dst_cctl;
        enum dma_transfer_direction runtime_direction;
-       dma_cookie_t lc;
        struct list_head pend_list;
        struct pl08x_txd *at;
        spinlock_t lock;
index 7e640bf27d2d86cf65c08946988519505d3a6896..c59c4f0c2cc99619f6b290acb54a322cb79e8ee1 100644 (file)
@@ -258,6 +258,7 @@ struct dma_chan_percpu {
  * struct dma_chan - devices supply DMA channels, clients use them
  * @device: ptr to the dma device who supplies this channel, always !%NULL
  * @cookie: last cookie value returned to client
+ * @completed_cookie: last completed cookie for this channel
  * @chan_id: channel ID for sysfs
  * @dev: class device for sysfs
  * @device_node: used to add this to the device chan list
@@ -269,6 +270,7 @@ struct dma_chan_percpu {
 struct dma_chan {
        struct dma_device *device;
        dma_cookie_t cookie;
+       dma_cookie_t completed_cookie;
 
        /* sysfs */
        int chan_id;