drm/amd/powerplay: implement power down asic task for CZ

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
index 65ad24a498a6ec4e491850ca1a526dde5ab5b54c..0874ab42ee95e7e83d4a027639b97a1a45a35890 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
@@ -925,6 +925,54 @@ static struct phm_master_table_header cz_setup_asic_master = {
        cz_setup_asic_list
 };
 
+static int cz_tf_power_up_display_clock_sys_pll(struct pp_hwmgr *hwmgr,
+                                       void *input, void *output,
+                                       void *storage, int result)
+{
+       struct cz_hwmgr *hw_data = (struct cz_hwmgr *)(hwmgr->backend);
+       hw_data->disp_clk_bypass_pending = false;
+       hw_data->disp_clk_bypass = false;
+
+       return 0;
+}
+
+static int cz_tf_clear_nb_dpm_flag(struct pp_hwmgr *hwmgr,
+                                       void *input, void *output,
+                                       void *storage, int result)
+{
+       struct cz_hwmgr *hw_data = (struct cz_hwmgr *)(hwmgr->backend);
+       hw_data->is_nb_dpm_enabled = false;
+
+       return 0;
+}
+
+static int cz_tf_reset_cc6_data(struct pp_hwmgr *hwmgr,
+                                       void *input, void *output,
+                                       void *storage, int result)
+{
+       struct cz_hwmgr *hw_data = (struct cz_hwmgr *)(hwmgr->backend);
+
+       hw_data->cc6_settings.cc6_setting_changed = false;
+       hw_data->cc6_settings.cpu_pstate_separation_time = 0;
+       hw_data->cc6_settings.cpu_cc6_disable = false;
+       hw_data->cc6_settings.cpu_pstate_disable = false;
+
+       return 0;
+}
+
+static struct phm_master_table_item cz_power_down_asic_list[] = {
+       {NULL, cz_tf_power_up_display_clock_sys_pll},
+       {NULL, cz_tf_clear_nb_dpm_flag},
+       {NULL, cz_tf_reset_cc6_data},
+       {NULL, NULL}
+};
+
+static struct phm_master_table_header cz_power_down_asic_master = {
+       0,
+       PHM_MasterTableFlag_None,
+       cz_power_down_asic_list
+};
+
 static int cz_tf_program_voting_clients(struct pp_hwmgr *hwmgr, void *input,
                                void *output, void *storage, int result)
 {
@@ -1126,6 +1174,13 @@ static int cz_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
                return result;
        }
 
+       result = phm_construct_table(hwmgr, &cz_power_down_asic_master,
+                               &(hwmgr->power_down_asic));
+       if (result != 0) {
+               printk(KERN_ERR "[ powerplay ] Fail to construct power down ASIC\n");
+               return result;
+       }
+
        result = phm_construct_table(hwmgr, &cz_disable_dpm_master,
                                &(hwmgr->disable_dynamic_state_management));
        if (result != 0) {