#ifndef __NVKM_PM_H__
#define __NVKM_PM_H__
-
-#include <core/device.h>
#include <core/engine.h>
-#include <core/engctx.h>
-struct nouveau_perfdom;
-struct nouveau_perfctr;
-struct nouveau_pm {
- struct nouveau_engine base;
+struct nvkm_perfdom;
+struct nvkm_perfctr;
+struct nvkm_pm {
+ struct nvkm_engine base;
- struct nouveau_perfctx *context;
+ struct nvkm_perfctx *context;
void *profile_data;
struct list_head domains;
u32 last;
};
-static inline struct nouveau_pm *
-nouveau_pm(void *obj)
+static inline struct nvkm_pm *
+nvkm_pm(void *obj)
{
- return (void *)nouveau_engine(obj, NVDEV_ENGINE_PM);
+ return (void *)nvkm_engine(obj, NVDEV_ENGINE_PM);
}
-extern struct nouveau_oclass *nv40_pm_oclass;
-extern struct nouveau_oclass *nv50_pm_oclass;
-extern struct nouveau_oclass *nv84_pm_oclass;
-extern struct nouveau_oclass *nva3_pm_oclass;
-extern struct nouveau_oclass nvc0_pm_oclass;
-extern struct nouveau_oclass nve0_pm_oclass;
-extern struct nouveau_oclass nvf0_pm_oclass;
-
+extern struct nvkm_oclass *nv40_pm_oclass;
+extern struct nvkm_oclass *nv50_pm_oclass;
+extern struct nvkm_oclass *g84_pm_oclass;
+extern struct nvkm_oclass *gt215_pm_oclass;
+extern struct nvkm_oclass gf100_pm_oclass;
+extern struct nvkm_oclass gk104_pm_oclass;
+extern struct nvkm_oclass gk110_pm_oclass;
#endif
device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
break;
case 0x86:
device->cname = "G86";
device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
break;
case 0x92:
device->cname = "G92";
device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = g84_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
break;
case 0x94:
device->cname = "G94";
device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
break;
case 0x96:
device->cname = "G96";
device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
break;
case 0x98:
device->cname = "G98";
device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass;
device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
break;
case 0xa0:
device->cname = "G200";
device->oclass[NVDEV_ENGINE_CIPHER ] = &g84_cipher_oclass;
device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt200_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
break;
case 0xaa:
device->cname = "MCP77/MCP78";
device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass;
device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
break;
case 0xac:
device->cname = "MCP79/MCP7A";
device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass;
device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
break;
case 0xa3:
device->cname = "GT215";
device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = nva3_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
break;
case 0xa5:
device->cname = "GT216";
device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = nva3_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
break;
case 0xa8:
device->cname = "GT218";
device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = nva3_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
break;
case 0xaf:
device->cname = "MCP89";
device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = nva3_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
break;
default:
nv_fatal(device, "unknown Tesla chipset\n");
device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &gf100_ce1_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gf100_pm_oclass;
break;
case 0xc4:
device->cname = "GF104";
device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &gf100_ce1_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gf100_pm_oclass;
break;
case 0xc3:
device->cname = "GF106";
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gf100_pm_oclass;
break;
case 0xce:
device->cname = "GF114";
device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &gf100_ce1_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gf100_pm_oclass;
break;
case 0xcf:
device->cname = "GF116";
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gf100_pm_oclass;
break;
case 0xc1:
device->cname = "GF108";
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gf100_pm_oclass;
break;
case 0xc8:
device->cname = "GF110";
device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_CE1 ] = &gf100_ce1_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gf100_pm_oclass;
break;
case 0xd9:
device->cname = "GF119";
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gf110_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gf100_pm_oclass;
break;
case 0xd7:
device->cname = "GF117";
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass;
device->oclass[NVDEV_ENGINE_DISP ] = gf110_disp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nvc0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gf100_pm_oclass;
break;
default:
nv_fatal(device, "unknown Fermi chipset\n");
device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nve0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
break;
case 0xe7:
device->cname = "GK107";
device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nve0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
break;
case 0xe6:
device->cname = "GK106";
device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nve0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
break;
case 0xea:
device->cname = "GK20A";
device->oclass[NVDEV_ENGINE_SW ] = nvc0_sw_oclass;
device->oclass[NVDEV_ENGINE_GR ] = gk20a_gr_oclass;
device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nve0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gk104_pm_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &gk20a_volt_oclass;
device->oclass[NVDEV_SUBDEV_PMU ] = gk20a_pmu_oclass;
break;
device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nvf0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass;
break;
case 0xf1:
device->cname = "GK110B";
device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
- device->oclass[NVDEV_ENGINE_PM ] = &nvf0_pm_oclass;
+ device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass;
break;
case 0x106:
device->cname = "GK208B";
nvkm-y += nvkm/engine/pm/daemon.o
nvkm-y += nvkm/engine/pm/nv40.o
nvkm-y += nvkm/engine/pm/nv50.o
-nvkm-y += nvkm/engine/pm/nv84.o
-nvkm-y += nvkm/engine/pm/nva3.o
-nvkm-y += nvkm/engine/pm/nvc0.o
-nvkm-y += nvkm/engine/pm/nve0.o
-nvkm-y += nvkm/engine/pm/nvf0.o
+nvkm-y += nvkm/engine/pm/g84.o
+nvkm-y += nvkm/engine/pm/gt215.o
+nvkm-y += nvkm/engine/pm/gf100.o
+nvkm-y += nvkm/engine/pm/gk104.o
+nvkm-y += nvkm/engine/pm/gk110.o
*
* Authors: Ben Skeggs
*/
+#include "priv.h"
#include <core/client.h>
+#include <core/device.h>
#include <core/option.h>
-#include <nvif/unpack.h>
+
#include <nvif/class.h>
#include <nvif/ioctl.h>
-
-#include <subdev/clk.h>
-
-#include "priv.h"
+#include <nvif/unpack.h>
#define QUAD_MASK 0x0f
#define QUAD_FREE 0x01
-static struct nouveau_perfsig *
-nouveau_perfsig_find_(struct nouveau_perfdom *dom, const char *name, u32 size)
+static struct nvkm_perfsig *
+nvkm_perfsig_find_(struct nvkm_perfdom *dom, const char *name, u32 size)
{
char path[64];
int i;
return NULL;
}
-struct nouveau_perfsig *
-nouveau_perfsig_find(struct nouveau_pm *ppm, const char *name, u32 size,
- struct nouveau_perfdom **pdom)
+struct nvkm_perfsig *
+nvkm_perfsig_find(struct nvkm_pm *ppm, const char *name, u32 size,
+ struct nvkm_perfdom **pdom)
{
- struct nouveau_perfdom *dom = *pdom;
- struct nouveau_perfsig *sig;
+ struct nvkm_perfdom *dom = *pdom;
+ struct nvkm_perfsig *sig;
if (dom == NULL) {
list_for_each_entry(dom, &ppm->domains, head) {
- sig = nouveau_perfsig_find_(dom, name, size);
+ sig = nvkm_perfsig_find_(dom, name, size);
if (sig) {
*pdom = dom;
return sig;
return NULL;
}
- return nouveau_perfsig_find_(dom, name, size);
+ return nvkm_perfsig_find_(dom, name, size);
}
-struct nouveau_perfctr *
-nouveau_perfsig_wrap(struct nouveau_pm *ppm, const char *name,
- struct nouveau_perfdom **pdom)
+struct nvkm_perfctr *
+nvkm_perfsig_wrap(struct nvkm_pm *ppm, const char *name,
+ struct nvkm_perfdom **pdom)
{
- struct nouveau_perfsig *sig;
- struct nouveau_perfctr *ctr;
+ struct nvkm_perfsig *sig;
+ struct nvkm_perfctr *ctr;
- sig = nouveau_perfsig_find(ppm, name, strlen(name), pdom);
+ sig = nvkm_perfsig_find(ppm, name, strlen(name), pdom);
if (!sig)
return NULL;
* Perfmon object classes
******************************************************************************/
static int
-nouveau_perfctr_query(struct nouveau_object *object, void *data, u32 size)
+nvkm_perfctr_query(struct nvkm_object *object, void *data, u32 size)
{
union {
struct nvif_perfctr_query_v0 v0;
} *args = data;
- struct nouveau_device *device = nv_device(object);
- struct nouveau_pm *ppm = (void *)object->engine;
- struct nouveau_perfdom *dom = NULL, *chk;
- const bool all = nouveau_boolopt(device->cfgopt, "NvPmShowAll", false);
- const bool raw = nouveau_boolopt(device->cfgopt, "NvPmUnnamed", all);
+ struct nvkm_device *device = nv_device(object);
+ struct nvkm_pm *ppm = (void *)object->engine;
+ struct nvkm_perfdom *dom = NULL, *chk;
+ const bool all = nvkm_boolopt(device->cfgopt, "NvPmShowAll", false);
+ const bool raw = nvkm_boolopt(device->cfgopt, "NvPmUnnamed", all);
const char *name;
int tmp = 0, di, si;
int ret;
}
static int
-nouveau_perfctr_sample(struct nouveau_object *object, void *data, u32 size)
+nvkm_perfctr_sample(struct nvkm_object *object, void *data, u32 size)
{
union {
struct nvif_perfctr_sample none;
} *args = data;
- struct nouveau_pm *ppm = (void *)object->engine;
- struct nouveau_perfctr *ctr, *tmp;
- struct nouveau_perfdom *dom;
+ struct nvkm_pm *ppm = (void *)object->engine;
+ struct nvkm_perfctr *ctr, *tmp;
+ struct nvkm_perfdom *dom;
int ret;
nv_ioctl(object, "perfctr sample size %d\n", size);
tmp = NULL;
while (!list_empty(&dom->list)) {
ctr = list_first_entry(&dom->list,
- typeof(*ctr), head);
+ typeof(*ctr), head);
if (ctr->slot < 0) break;
if ( tmp && tmp == ctr) break;
if (!tmp) tmp = ctr;
}
static int
-nouveau_perfctr_read(struct nouveau_object *object, void *data, u32 size)
+nvkm_perfctr_read(struct nvkm_object *object, void *data, u32 size)
{
union {
struct nvif_perfctr_read_v0 v0;
} *args = data;
- struct nouveau_perfctr *ctr = (void *)object;
+ struct nvkm_perfctr *ctr = (void *)object;
int ret;
nv_ioctl(object, "perfctr read size %d\n", size);
}
static int
-nouveau_perfctr_mthd(struct nouveau_object *object, u32 mthd,
- void *data, u32 size)
+nvkm_perfctr_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size)
{
switch (mthd) {
case NVIF_PERFCTR_V0_QUERY:
- return nouveau_perfctr_query(object, data, size);
+ return nvkm_perfctr_query(object, data, size);
case NVIF_PERFCTR_V0_SAMPLE:
- return nouveau_perfctr_sample(object, data, size);
+ return nvkm_perfctr_sample(object, data, size);
case NVIF_PERFCTR_V0_READ:
- return nouveau_perfctr_read(object, data, size);
+ return nvkm_perfctr_read(object, data, size);
default:
break;
}
}
static void
-nouveau_perfctr_dtor(struct nouveau_object *object)
+nvkm_perfctr_dtor(struct nvkm_object *object)
{
- struct nouveau_perfctr *ctr = (void *)object;
+ struct nvkm_perfctr *ctr = (void *)object;
if (ctr->head.next)
list_del(&ctr->head);
- nouveau_object_destroy(&ctr->base);
+ nvkm_object_destroy(&ctr->base);
}
static int
-nouveau_perfctr_ctor(struct nouveau_object *parent,
- struct nouveau_object *engine,
- struct nouveau_oclass *oclass, void *data, u32 size,
- struct nouveau_object **pobject)
+nvkm_perfctr_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+ struct nvkm_oclass *oclass, void *data, u32 size,
+ struct nvkm_object **pobject)
{
union {
struct nvif_perfctr_v0 v0;
} *args = data;
- struct nouveau_pm *ppm = (void *)engine;
- struct nouveau_perfdom *dom = NULL;
- struct nouveau_perfsig *sig[4] = {};
- struct nouveau_perfctr *ctr;
+ struct nvkm_pm *ppm = (void *)engine;
+ struct nvkm_perfdom *dom = NULL;
+ struct nvkm_perfsig *sig[4] = {};
+ struct nvkm_perfctr *ctr;
int ret, i;
nv_ioctl(parent, "create perfctr size %d\n", size);
return ret;
for (i = 0; i < ARRAY_SIZE(args->v0.name) && args->v0.name[i][0]; i++) {
- sig[i] = nouveau_perfsig_find(ppm, args->v0.name[i],
- strnlen(args->v0.name[i],
- sizeof(args->v0.name[i])),
- &dom);
+ sig[i] = nvkm_perfsig_find(ppm, args->v0.name[i],
+ strnlen(args->v0.name[i],
+ sizeof(args->v0.name[i])),
+ &dom);
if (!sig[i])
return -EINVAL;
}
- ret = nouveau_object_create(parent, engine, oclass, 0, &ctr);
+ ret = nvkm_object_create(parent, engine, oclass, 0, &ctr);
*pobject = nv_object(ctr);
if (ret)
return ret;
return 0;
}
-static struct nouveau_ofuncs
-nouveau_perfctr_ofuncs = {
- .ctor = nouveau_perfctr_ctor,
- .dtor = nouveau_perfctr_dtor,
- .init = nouveau_object_init,
- .fini = nouveau_object_fini,
- .mthd = nouveau_perfctr_mthd,
+static struct nvkm_ofuncs
+nvkm_perfctr_ofuncs = {
+ .ctor = nvkm_perfctr_ctor,
+ .dtor = nvkm_perfctr_dtor,
+ .init = nvkm_object_init,
+ .fini = nvkm_object_fini,
+ .mthd = nvkm_perfctr_mthd,
};
-struct nouveau_oclass
-nouveau_pm_sclass[] = {
+struct nvkm_oclass
+nvkm_pm_sclass[] = {
{ .handle = NVIF_IOCTL_NEW_V0_PERFCTR,
- .ofuncs = &nouveau_perfctr_ofuncs,
+ .ofuncs = &nvkm_perfctr_ofuncs,
},
{},
};
* PPM context
******************************************************************************/
static void
-nouveau_perfctx_dtor(struct nouveau_object *object)
+nvkm_perfctx_dtor(struct nvkm_object *object)
{
- struct nouveau_pm *ppm = (void *)object->engine;
+ struct nvkm_pm *ppm = (void *)object->engine;
mutex_lock(&nv_subdev(ppm)->mutex);
- nouveau_engctx_destroy(&ppm->context->base);
+ nvkm_engctx_destroy(&ppm->context->base);
ppm->context = NULL;
mutex_unlock(&nv_subdev(ppm)->mutex);
}
static int
-nouveau_perfctx_ctor(struct nouveau_object *parent,
- struct nouveau_object *engine,
- struct nouveau_oclass *oclass, void *data, u32 size,
- struct nouveau_object **pobject)
+nvkm_perfctx_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+ struct nvkm_oclass *oclass, void *data, u32 size,
+ struct nvkm_object **pobject)
{
- struct nouveau_pm *ppm = (void *)engine;
- struct nouveau_perfctx *ctx;
+ struct nvkm_pm *ppm = (void *)engine;
+ struct nvkm_perfctx *ctx;
int ret;
- ret = nouveau_engctx_create(parent, engine, oclass, NULL,
- 0, 0, 0, &ctx);
+ ret = nvkm_engctx_create(parent, engine, oclass, NULL, 0, 0, 0, &ctx);
*pobject = nv_object(ctx);
if (ret)
return ret;
return 0;
}
-struct nouveau_oclass
-nouveau_pm_cclass = {
+struct nvkm_oclass
+nvkm_pm_cclass = {
.handle = NV_ENGCTX(PM, 0x00),
- .ofuncs = &(struct nouveau_ofuncs) {
- .ctor = nouveau_perfctx_ctor,
- .dtor = nouveau_perfctx_dtor,
- .init = _nouveau_engctx_init,
- .fini = _nouveau_engctx_fini,
+ .ofuncs = &(struct nvkm_ofuncs) {
+ .ctor = nvkm_perfctx_ctor,
+ .dtor = nvkm_perfctx_dtor,
+ .init = _nvkm_engctx_init,
+ .fini = _nvkm_engctx_fini,
},
};
* PPM engine/subdev functions
******************************************************************************/
int
-nouveau_perfdom_new(struct nouveau_pm *ppm, const char *name, u32 mask,
- u32 base, u32 size_unit, u32 size_domain,
- const struct nouveau_specdom *spec)
+nvkm_perfdom_new(struct nvkm_pm *ppm, const char *name, u32 mask,
+ u32 base, u32 size_unit, u32 size_domain,
+ const struct nvkm_specdom *spec)
{
- const struct nouveau_specdom *sdom;
- const struct nouveau_specsig *ssig;
- struct nouveau_perfdom *dom;
+ const struct nvkm_specdom *sdom;
+ const struct nvkm_specsig *ssig;
+ struct nvkm_perfdom *dom;
int i;
for (i = 0; i == 0 || mask; i++) {
}
int
-_nouveau_pm_fini(struct nouveau_object *object, bool suspend)
+_nvkm_pm_fini(struct nvkm_object *object, bool suspend)
{
- struct nouveau_pm *ppm = (void *)object;
- return nouveau_engine_fini(&ppm->base, suspend);
+ struct nvkm_pm *ppm = (void *)object;
+ return nvkm_engine_fini(&ppm->base, suspend);
}
int
-_nouveau_pm_init(struct nouveau_object *object)
+_nvkm_pm_init(struct nvkm_object *object)
{
- struct nouveau_pm *ppm = (void *)object;
- return nouveau_engine_init(&ppm->base);
+ struct nvkm_pm *ppm = (void *)object;
+ return nvkm_engine_init(&ppm->base);
}
void
-_nouveau_pm_dtor(struct nouveau_object *object)
+_nvkm_pm_dtor(struct nvkm_object *object)
{
- struct nouveau_pm *ppm = (void *)object;
- struct nouveau_perfdom *dom, *tmp;
+ struct nvkm_pm *ppm = (void *)object;
+ struct nvkm_perfdom *dom, *tmp;
list_for_each_entry_safe(dom, tmp, &ppm->domains, head) {
list_del(&dom->head);
kfree(dom);
}
- nouveau_engine_destroy(&ppm->base);
+ nvkm_engine_destroy(&ppm->base);
}
int
-nouveau_pm_create_(struct nouveau_object *parent,
- struct nouveau_object *engine,
- struct nouveau_oclass *oclass,
- int length, void **pobject)
+nvkm_pm_create_(struct nvkm_object *parent, struct nvkm_object *engine,
+ struct nvkm_oclass *oclass, int length, void **pobject)
{
- struct nouveau_pm *ppm;
+ struct nvkm_pm *ppm;
int ret;
- ret = nouveau_engine_create_(parent, engine, oclass, true, "PPM",
- "pm", length, pobject);
+ ret = nvkm_engine_create_(parent, engine, oclass, true, "PPM",
+ "pm", length, pobject);
ppm = *pobject;
if (ret)
return ret;
*
* Authors: Ben Skeggs
*/
-
#include "priv.h"
static void
-pwr_perfctr_init(struct nouveau_pm *ppm, struct nouveau_perfdom *dom,
- struct nouveau_perfctr *ctr)
+pwr_perfctr_init(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
+ struct nvkm_perfctr *ctr)
{
u32 mask = 0x00000000;
u32 ctrl = 0x00000001;
}
static void
-pwr_perfctr_read(struct nouveau_pm *ppm, struct nouveau_perfdom *dom,
- struct nouveau_perfctr *ctr)
+pwr_perfctr_read(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
+ struct nvkm_perfctr *ctr)
{
ctr->ctr = ppm->pwr[ctr->slot];
ctr->clk = ppm->pwr[ppm->last];
}
static void
-pwr_perfctr_next(struct nouveau_pm *ppm, struct nouveau_perfdom *dom)
+pwr_perfctr_next(struct nvkm_pm *ppm, struct nvkm_perfdom *dom)
{
int i;
}
}
-static const struct nouveau_funcdom
+static const struct nvkm_funcdom
pwr_perfctr_func = {
.init = pwr_perfctr_init,
.read = pwr_perfctr_read,
.next = pwr_perfctr_next,
};
-const struct nouveau_specdom
-nva3_pm_pwr[] = {
- { 0x20, (const struct nouveau_specsig[]) {
+const struct nvkm_specdom
+gt215_pm_pwr[] = {
+ { 0x20, (const struct nvkm_specsig[]) {
{ 0x00, "pwr_gr_idle" },
{ 0x04, "pwr_bsp_idle" },
{ 0x05, "pwr_vp_idle" },
{}
};
-const struct nouveau_specdom
-nvc0_pm_pwr[] = {
- { 0x20, (const struct nouveau_specsig[]) {
+const struct nvkm_specdom
+gf100_pm_pwr[] = {
+ { 0x20, (const struct nvkm_specsig[]) {
{ 0x00, "pwr_gr_idle" },
{ 0x04, "pwr_bsp_idle" },
{ 0x05, "pwr_vp_idle" },
{}
};
-const struct nouveau_specdom
-nve0_pm_pwr[] = {
- { 0x20, (const struct nouveau_specsig[]) {
+const struct nvkm_specdom
+gk104_pm_pwr[] = {
+ { 0x20, (const struct nvkm_specsig[]) {
{ 0x00, "pwr_gr_idle" },
{ 0x04, "pwr_bsp_idle" },
{ 0x05, "pwr_vp_idle" },
--- /dev/null
+/*
+ * Copyright 2013 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "nv40.h"
+
+static const struct nvkm_specdom
+g84_pm[] = {
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ {}
+};
+
+struct nvkm_oclass *
+g84_pm_oclass = &(struct nv40_pm_oclass) {
+ .base.handle = NV_ENGINE(PM, 0x84),
+ .base.ofuncs = &(struct nvkm_ofuncs) {
+ .ctor = nv40_pm_ctor,
+ .dtor = _nvkm_pm_dtor,
+ .init = _nvkm_pm_init,
+ .fini = _nvkm_pm_fini,
+ },
+ .doms = g84_pm,
+}.base;
--- /dev/null
+/*
+ * Copyright 2013 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "gf100.h"
+
+static const struct nvkm_specdom
+gf100_pm_hub[] = {
+ {}
+};
+
+static const struct nvkm_specdom
+gf100_pm_gpc[] = {
+ {}
+};
+
+static const struct nvkm_specdom
+gf100_pm_part[] = {
+ {}
+};
+
+static void
+gf100_perfctr_init(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
+ struct nvkm_perfctr *ctr)
+{
+ struct gf100_pm_priv *priv = (void *)ppm;
+ struct gf100_pm_cntr *cntr = (void *)ctr;
+ u32 log = ctr->logic_op;
+ u32 src = 0x00000000;
+ int i;
+
+ for (i = 0; i < 4 && ctr->signal[i]; i++)
+ src |= (ctr->signal[i] - dom->signal) << (i * 8);
+
+ nv_wr32(priv, dom->addr + 0x09c, 0x00040002);
+ nv_wr32(priv, dom->addr + 0x100, 0x00000000);
+ nv_wr32(priv, dom->addr + 0x040 + (cntr->base.slot * 0x08), src);
+ nv_wr32(priv, dom->addr + 0x044 + (cntr->base.slot * 0x08), log);
+}
+
+static void
+gf100_perfctr_read(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
+ struct nvkm_perfctr *ctr)
+{
+ struct gf100_pm_priv *priv = (void *)ppm;
+ struct gf100_pm_cntr *cntr = (void *)ctr;
+
+ switch (cntr->base.slot) {
+ case 0: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x08c); break;
+ case 1: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x088); break;
+ case 2: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x080); break;
+ case 3: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x090); break;
+ }
+ cntr->base.clk = nv_rd32(priv, dom->addr + 0x070);
+}
+
+static void
+gf100_perfctr_next(struct nvkm_pm *ppm, struct nvkm_perfdom *dom)
+{
+ struct gf100_pm_priv *priv = (void *)ppm;
+ nv_wr32(priv, dom->addr + 0x06c, dom->signal_nr - 0x40 + 0x27);
+ nv_wr32(priv, dom->addr + 0x0ec, 0x00000011);
+}
+
+const struct nvkm_funcdom
+gf100_perfctr_func = {
+ .init = gf100_perfctr_init,
+ .read = gf100_perfctr_read,
+ .next = gf100_perfctr_next,
+};
+
+int
+gf100_pm_fini(struct nvkm_object *object, bool suspend)
+{
+ struct gf100_pm_priv *priv = (void *)object;
+ nv_mask(priv, 0x000200, 0x10000000, 0x00000000);
+ nv_mask(priv, 0x000200, 0x10000000, 0x10000000);
+ return nvkm_pm_fini(&priv->base, suspend);
+}
+
+static int
+gf100_pm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+ struct nvkm_oclass *oclass, void *data, u32 size,
+ struct nvkm_object **pobject)
+{
+ struct gf100_pm_priv *priv;
+ u32 mask;
+ int ret;
+
+ ret = nvkm_pm_create(parent, engine, oclass, &priv);
+ *pobject = nv_object(priv);
+ if (ret)
+ return ret;
+
+ ret = nvkm_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0, gf100_pm_pwr);
+ if (ret)
+ return ret;
+
+ /* HUB */
+ ret = nvkm_perfdom_new(&priv->base, "hub", 0, 0x1b0000, 0, 0x200,
+ gf100_pm_hub);
+ if (ret)
+ return ret;
+
+ /* GPC */
+ mask = (1 << nv_rd32(priv, 0x022430)) - 1;
+ mask &= ~nv_rd32(priv, 0x022504);
+ mask &= ~nv_rd32(priv, 0x022584);
+
+ ret = nvkm_perfdom_new(&priv->base, "gpc", mask, 0x180000,
+ 0x1000, 0x200, gf100_pm_gpc);
+ if (ret)
+ return ret;
+
+ /* PART */
+ mask = (1 << nv_rd32(priv, 0x022438)) - 1;
+ mask &= ~nv_rd32(priv, 0x022548);
+ mask &= ~nv_rd32(priv, 0x0225c8);
+
+ ret = nvkm_perfdom_new(&priv->base, "part", mask, 0x1a0000,
+ 0x1000, 0x200, gf100_pm_part);
+ if (ret)
+ return ret;
+
+ nv_engine(priv)->cclass = &nvkm_pm_cclass;
+ nv_engine(priv)->sclass = nvkm_pm_sclass;
+ priv->base.last = 7;
+ return 0;
+}
+
+struct nvkm_oclass
+gf100_pm_oclass = {
+ .handle = NV_ENGINE(PM, 0xc0),
+ .ofuncs = &(struct nvkm_ofuncs) {
+ .ctor = gf100_pm_ctor,
+ .dtor = _nvkm_pm_dtor,
+ .init = _nvkm_pm_init,
+ .fini = gf100_pm_fini,
+ },
+};
--- /dev/null
+#ifndef __NVKM_PM_NVC0_H__
+#define __NVKM_PM_NVC0_H__
+#include "priv.h"
+
+struct gf100_pm_priv {
+ struct nvkm_pm base;
+};
+
+struct gf100_pm_cntr {
+ struct nvkm_perfctr base;
+};
+
+extern const struct nvkm_funcdom gf100_perfctr_func;
+int gf100_pm_fini(struct nvkm_object *, bool);
+#endif
--- /dev/null
+/*
+ * Copyright 2013 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "gf100.h"
+
+static const struct nvkm_specdom
+gk104_pm_hub[] = {
+ { 0x60, (const struct nvkm_specsig[]) {
+ { 0x47, "hub00_user_0" },
+ {}
+ }, &gf100_perfctr_func },
+ { 0x40, (const struct nvkm_specsig[]) {
+ { 0x27, "hub01_user_0" },
+ {}
+ }, &gf100_perfctr_func },
+ { 0x60, (const struct nvkm_specsig[]) {
+ { 0x47, "hub02_user_0" },
+ {}
+ }, &gf100_perfctr_func },
+ { 0x60, (const struct nvkm_specsig[]) {
+ { 0x47, "hub03_user_0" },
+ {}
+ }, &gf100_perfctr_func },
+ { 0x40, (const struct nvkm_specsig[]) {
+ { 0x03, "host_mmio_rd" },
+ { 0x27, "hub04_user_0" },
+ {}
+ }, &gf100_perfctr_func },
+ { 0x60, (const struct nvkm_specsig[]) {
+ { 0x47, "hub05_user_0" },
+ {}
+ }, &gf100_perfctr_func },
+ { 0xc0, (const struct nvkm_specsig[]) {
+ { 0x74, "host_fb_rd3x" },
+ { 0x75, "host_fb_rd3x_2" },
+ { 0xa7, "hub06_user_0" },
+ {}
+ }, &gf100_perfctr_func },
+ { 0x60, (const struct nvkm_specsig[]) {
+ { 0x47, "hub07_user_0" },
+ {}
+ }, &gf100_perfctr_func },
+ {}
+};
+
+static const struct nvkm_specdom
+gk104_pm_gpc[] = {
+ { 0xe0, (const struct nvkm_specsig[]) {
+ { 0xc7, "gpc00_user_0" },
+ {}
+ }, &gf100_perfctr_func },
+ {}
+};
+
+static const struct nvkm_specdom
+gk104_pm_part[] = {
+ { 0x60, (const struct nvkm_specsig[]) {
+ { 0x47, "part00_user_0" },
+ {}
+ }, &gf100_perfctr_func },
+ { 0x60, (const struct nvkm_specsig[]) {
+ { 0x47, "part01_user_0" },
+ {}
+ }, &gf100_perfctr_func },
+ {}
+};
+
+static int
+gk104_pm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+ struct nvkm_oclass *oclass, void *data, u32 size,
+ struct nvkm_object **pobject)
+{
+ struct gf100_pm_priv *priv;
+ u32 mask;
+ int ret;
+
+ ret = nvkm_pm_create(parent, engine, oclass, &priv);
+ *pobject = nv_object(priv);
+ if (ret)
+ return ret;
+
+ /* PDAEMON */
+ ret = nvkm_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0, gk104_pm_pwr);
+ if (ret)
+ return ret;
+
+ /* HUB */
+ ret = nvkm_perfdom_new(&priv->base, "hub", 0, 0x1b0000, 0, 0x200,
+ gk104_pm_hub);
+ if (ret)
+ return ret;
+
+ /* GPC */
+ mask = (1 << nv_rd32(priv, 0x022430)) - 1;
+ mask &= ~nv_rd32(priv, 0x022504);
+ mask &= ~nv_rd32(priv, 0x022584);
+
+ ret = nvkm_perfdom_new(&priv->base, "gpc", mask, 0x180000,
+ 0x1000, 0x200, gk104_pm_gpc);
+ if (ret)
+ return ret;
+
+ /* PART */
+ mask = (1 << nv_rd32(priv, 0x022438)) - 1;
+ mask &= ~nv_rd32(priv, 0x022548);
+ mask &= ~nv_rd32(priv, 0x0225c8);
+
+ ret = nvkm_perfdom_new(&priv->base, "part", mask, 0x1a0000,
+ 0x1000, 0x200, gk104_pm_part);
+ if (ret)
+ return ret;
+
+ nv_engine(priv)->cclass = &nvkm_pm_cclass;
+ nv_engine(priv)->sclass = nvkm_pm_sclass;
+ priv->base.last = 7;
+ return 0;
+}
+
+struct nvkm_oclass
+gk104_pm_oclass = {
+ .handle = NV_ENGINE(PM, 0xe0),
+ .ofuncs = &(struct nvkm_ofuncs) {
+ .ctor = gk104_pm_ctor,
+ .dtor = _nvkm_pm_dtor,
+ .init = _nvkm_pm_init,
+ .fini = gf100_pm_fini,
+ },
+};
--- /dev/null
+/*
+ * Copyright 2013 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "gf100.h"
+
+static int
+gk110_pm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+ struct nvkm_oclass *oclass, void *data, u32 size,
+ struct nvkm_object **pobject)
+{
+ struct gf100_pm_priv *priv;
+ int ret;
+
+ ret = nvkm_pm_create(parent, engine, oclass, &priv);
+ *pobject = nv_object(priv);
+ if (ret)
+ return ret;
+
+ ret = nvkm_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0, gk104_pm_pwr);
+ if (ret)
+ return ret;
+
+ nv_engine(priv)->cclass = &nvkm_pm_cclass;
+ nv_engine(priv)->sclass = nvkm_pm_sclass;
+ return 0;
+}
+
+struct nvkm_oclass
+gk110_pm_oclass = {
+ .handle = NV_ENGINE(PM, 0xf0),
+ .ofuncs = &(struct nvkm_ofuncs) {
+ .ctor = gk110_pm_ctor,
+ .dtor = _nvkm_pm_dtor,
+ .init = _nvkm_pm_init,
+ .fini = gf100_pm_fini,
+ },
+};
--- /dev/null
+/*
+ * Copyright 2013 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "nv40.h"
+
+static const struct nvkm_specdom
+gt215_pm[] = {
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ { 0x20, (const struct nvkm_specsig[]) {
+ {}
+ }, &nv40_perfctr_func },
+ {}
+};
+
+static int
+gt215_pm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+ struct nvkm_oclass *oclass, void *data, u32 size,
+ struct nvkm_object **object)
+{
+ int ret = nv40_pm_ctor(parent, engine, oclass, data, size, object);
+ if (ret == 0) {
+ struct nv40_pm_priv *priv = (void *)*object;
+ ret = nvkm_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0,
+ gt215_pm_pwr);
+ if (ret)
+ return ret;
+
+ priv->base.last = 3;
+ }
+ return ret;
+}
+
+struct nvkm_oclass *
+gt215_pm_oclass = &(struct nv40_pm_oclass) {
+ .base.handle = NV_ENGINE(PM, 0xa3),
+ .base.ofuncs = &(struct nvkm_ofuncs) {
+ .ctor = gt215_pm_ctor,
+ .dtor = _nvkm_pm_dtor,
+ .init = _nvkm_pm_init,
+ .fini = _nvkm_pm_fini,
+ },
+ .doms = gt215_pm,
+}.base;
*
* Authors: Ben Skeggs
*/
-
#include "nv40.h"
-/*******************************************************************************
- * Perfmon object classes
- ******************************************************************************/
-
-/*******************************************************************************
- * PPM context
- ******************************************************************************/
-
-/*******************************************************************************
- * PPM engine/subdev functions
- ******************************************************************************/
-
static void
-nv40_perfctr_init(struct nouveau_pm *ppm, struct nouveau_perfdom *dom,
- struct nouveau_perfctr *ctr)
+nv40_perfctr_init(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
+ struct nvkm_perfctr *ctr)
{
struct nv40_pm_priv *priv = (void *)ppm;
struct nv40_pm_cntr *cntr = (void *)ctr;
}
static void
-nv40_perfctr_read(struct nouveau_pm *ppm, struct nouveau_perfdom *dom,
- struct nouveau_perfctr *ctr)
+nv40_perfctr_read(struct nvkm_pm *ppm, struct nvkm_perfdom *dom,
+ struct nvkm_perfctr *ctr)
{
struct nv40_pm_priv *priv = (void *)ppm;
struct nv40_pm_cntr *cntr = (void *)ctr;
}
static void
-nv40_perfctr_next(struct nouveau_pm *ppm, struct nouveau_perfdom *dom)
+nv40_perfctr_next(struct nvkm_pm *ppm, struct nvkm_perfdom *dom)
{
struct nv40_pm_priv *priv = (void *)ppm;
if (priv->sequence != ppm->sequence) {
}
}
-const struct nouveau_funcdom
+const struct nvkm_funcdom
nv40_perfctr_func = {
.init = nv40_perfctr_init,
.read = nv40_perfctr_read,
.next = nv40_perfctr_next,
};
-static const struct nouveau_specdom
+static const struct nvkm_specdom
nv40_pm[] = {
- { 0x20, (const struct nouveau_specsig[]) {
+ { 0x20, (const struct nvkm_specsig[]) {
{}
}, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
+ { 0x20, (const struct nvkm_specsig[]) {
{}
}, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
+ { 0x20, (const struct nvkm_specsig[]) {
{}
}, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
+ { 0x20, (const struct nvkm_specsig[]) {
{}
}, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
+ { 0x20, (const struct nvkm_specsig[]) {
{}
}, &nv40_perfctr_func },
{}
};
int
-nv40_pm_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
- struct nouveau_oclass *oclass, void *data, u32 size,
- struct nouveau_object **pobject)
+nv40_pm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
+ struct nvkm_oclass *oclass, void *data, u32 size,
+ struct nvkm_object **pobject)
{
struct nv40_pm_oclass *mclass = (void *)oclass;
struct nv40_pm_priv *priv;
int ret;
- ret = nouveau_pm_create(parent, engine, oclass, &priv);
+ ret = nvkm_pm_create(parent, engine, oclass, &priv);
*pobject = nv_object(priv);
if (ret)
return ret;
- ret = nouveau_perfdom_new(&priv->base, "pm", 0, 0, 0, 4, mclass->doms);
+ ret = nvkm_perfdom_new(&priv->base, "pm", 0, 0, 0, 4, mclass->doms);
if (ret)
return ret;
- nv_engine(priv)->cclass = &nouveau_pm_cclass;
- nv_engine(priv)->sclass = nouveau_pm_sclass;
+ nv_engine(priv)->cclass = &nvkm_pm_cclass;
+ nv_engine(priv)->sclass = nvkm_pm_sclass;
return 0;
}
-struct nouveau_oclass *
+struct nvkm_oclass *
nv40_pm_oclass = &(struct nv40_pm_oclass) {
.base.handle = NV_ENGINE(PM, 0x40),
- .base.ofuncs = &(struct nouveau_ofuncs) {
+ .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv40_pm_ctor,
- .dtor = _nouveau_pm_dtor,
- .init = _nouveau_pm_init,
- .fini = _nouveau_pm_fini,
+ .dtor = _nvkm_pm_dtor,
+ .init = _nvkm_pm_init,
+ .fini = _nvkm_pm_fini,
},
.doms = nv40_pm,
}.base;
#ifndef __NVKM_PM_NV40_H__
#define __NVKM_PM_NV40_H__
-
#include "priv.h"
struct nv40_pm_oclass {
- struct nouveau_oclass base;
- const struct nouveau_specdom *doms;
+ struct nvkm_oclass base;
+ const struct nvkm_specdom *doms;
};
struct nv40_pm_priv {
- struct nouveau_pm base;
+ struct nvkm_pm base;
u32 sequence;
};
-int nv40_pm_ctor(struct nouveau_object *, struct nouveau_object *,
- struct nouveau_oclass *, void *data, u32 size,
- struct nouveau_object **pobject);
+int nv40_pm_ctor(struct nvkm_object *, struct nvkm_object *,
+ struct nvkm_oclass *, void *data, u32 size,
+ struct nvkm_object **pobject);
struct nv40_pm_cntr {
- struct nouveau_perfctr base;
+ struct nvkm_perfctr base;
};
-extern const struct nouveau_funcdom nv40_perfctr_func;
-
+extern const struct nvkm_funcdom nv40_perfctr_func;
#endif
*
* Authors: Ben Skeggs
*/
-
#include "nv40.h"
-/*******************************************************************************
- * Perfmon object classes
- ******************************************************************************/
-
-/*******************************************************************************
- * PPM context
- ******************************************************************************/
-
-/*******************************************************************************
- * PPM engine/subdev functions
- ******************************************************************************/
-
-static const struct nouveau_specdom
+static const struct nvkm_specdom
nv50_pm[] = {
- { 0x040, (const struct nouveau_specsig[]) {
+ { 0x040, (const struct nvkm_specsig[]) {
{}
}, &nv40_perfctr_func },
- { 0x100, (const struct nouveau_specsig[]) {
+ { 0x100, (const struct nvkm_specsig[]) {
{ 0xc8, "gr_idle" },
{}
}, &nv40_perfctr_func },
- { 0x100, (const struct nouveau_specsig[]) {
+ { 0x100, (const struct nvkm_specsig[]) {
{}
}, &nv40_perfctr_func },
- { 0x020, (const struct nouveau_specsig[]) {
+ { 0x020, (const struct nvkm_specsig[]) {
{}
}, &nv40_perfctr_func },
- { 0x040, (const struct nouveau_specsig[]) {
+ { 0x040, (const struct nvkm_specsig[]) {
{}
}, &nv40_perfctr_func },
{}
};
-struct nouveau_oclass *
+struct nvkm_oclass *
nv50_pm_oclass = &(struct nv40_pm_oclass) {
.base.handle = NV_ENGINE(PM, 0x50),
- .base.ofuncs = &(struct nouveau_ofuncs) {
+ .base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv40_pm_ctor,
- .dtor = _nouveau_pm_dtor,
- .init = _nouveau_pm_init,
- .fini = _nouveau_pm_fini,
+ .dtor = _nvkm_pm_dtor,
+ .init = _nvkm_pm_init,
+ .fini = _nvkm_pm_fini,
},
.doms = nv50_pm,
}.base;
+++ /dev/null
-/*
- * Copyright 2013 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include "nv40.h"
-
-/*******************************************************************************
- * Perfmon object classes
- ******************************************************************************/
-
-/*******************************************************************************
- * PPM context
- ******************************************************************************/
-
-/*******************************************************************************
- * PPM engine/subdev functions
- ******************************************************************************/
-
-static const struct nouveau_specdom
-nv84_pm[] = {
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- {}
-};
-
-struct nouveau_oclass *
-nv84_pm_oclass = &(struct nv40_pm_oclass) {
- .base.handle = NV_ENGINE(PM, 0x84),
- .base.ofuncs = &(struct nouveau_ofuncs) {
- .ctor = nv40_pm_ctor,
- .dtor = _nouveau_pm_dtor,
- .init = _nouveau_pm_init,
- .fini = _nouveau_pm_fini,
- },
- .doms = nv84_pm,
-}.base;
+++ /dev/null
-/*
- * Copyright 2013 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include "nv40.h"
-
-/*******************************************************************************
- * Perfmon object classes
- ******************************************************************************/
-
-/*******************************************************************************
- * PPM context
- ******************************************************************************/
-
-/*******************************************************************************
- * PPM engine/subdev functions
- ******************************************************************************/
-
-static const struct nouveau_specdom
-nva3_pm[] = {
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- { 0x20, (const struct nouveau_specsig[]) {
- {}
- }, &nv40_perfctr_func },
- {}
-};
-
-static int
-nva3_pm_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
- struct nouveau_oclass *oclass, void *data, u32 size,
- struct nouveau_object **object)
-{
- int ret = nv40_pm_ctor(parent, engine, oclass, data, size, object);
- if (ret == 0) {
- struct nv40_pm_priv *priv = (void *)*object;
- ret = nouveau_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0,
- nva3_pm_pwr);
- if (ret)
- return ret;
-
- priv->base.last = 3;
- }
- return ret;
-}
-
-struct nouveau_oclass *
-nva3_pm_oclass = &(struct nv40_pm_oclass) {
- .base.handle = NV_ENGINE(PM, 0xa3),
- .base.ofuncs = &(struct nouveau_ofuncs) {
- .ctor = nva3_pm_ctor,
- .dtor = _nouveau_pm_dtor,
- .init = _nouveau_pm_init,
- .fini = _nouveau_pm_fini,
- },
- .doms = nva3_pm,
-}.base;
+++ /dev/null
-/*
- * Copyright 2013 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include "nvc0.h"
-
-/*******************************************************************************
- * Perfmon object classes
- ******************************************************************************/
-
-/*******************************************************************************
- * PPM context
- ******************************************************************************/
-
-/*******************************************************************************
- * PPM engine/subdev functions
- ******************************************************************************/
-
-static const struct nouveau_specdom
-nvc0_pm_hub[] = {
- {}
-};
-
-static const struct nouveau_specdom
-nvc0_pm_gpc[] = {
- {}
-};
-
-static const struct nouveau_specdom
-nvc0_pm_part[] = {
- {}
-};
-
-static void
-nvc0_perfctr_init(struct nouveau_pm *ppm, struct nouveau_perfdom *dom,
- struct nouveau_perfctr *ctr)
-{
- struct nvc0_pm_priv *priv = (void *)ppm;
- struct nvc0_pm_cntr *cntr = (void *)ctr;
- u32 log = ctr->logic_op;
- u32 src = 0x00000000;
- int i;
-
- for (i = 0; i < 4 && ctr->signal[i]; i++)
- src |= (ctr->signal[i] - dom->signal) << (i * 8);
-
- nv_wr32(priv, dom->addr + 0x09c, 0x00040002);
- nv_wr32(priv, dom->addr + 0x100, 0x00000000);
- nv_wr32(priv, dom->addr + 0x040 + (cntr->base.slot * 0x08), src);
- nv_wr32(priv, dom->addr + 0x044 + (cntr->base.slot * 0x08), log);
-}
-
-static void
-nvc0_perfctr_read(struct nouveau_pm *ppm, struct nouveau_perfdom *dom,
- struct nouveau_perfctr *ctr)
-{
- struct nvc0_pm_priv *priv = (void *)ppm;
- struct nvc0_pm_cntr *cntr = (void *)ctr;
-
- switch (cntr->base.slot) {
- case 0: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x08c); break;
- case 1: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x088); break;
- case 2: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x080); break;
- case 3: cntr->base.ctr = nv_rd32(priv, dom->addr + 0x090); break;
- }
- cntr->base.clk = nv_rd32(priv, dom->addr + 0x070);
-}
-
-static void
-nvc0_perfctr_next(struct nouveau_pm *ppm, struct nouveau_perfdom *dom)
-{
- struct nvc0_pm_priv *priv = (void *)ppm;
- nv_wr32(priv, dom->addr + 0x06c, dom->signal_nr - 0x40 + 0x27);
- nv_wr32(priv, dom->addr + 0x0ec, 0x00000011);
-}
-
-const struct nouveau_funcdom
-nvc0_perfctr_func = {
- .init = nvc0_perfctr_init,
- .read = nvc0_perfctr_read,
- .next = nvc0_perfctr_next,
-};
-
-int
-nvc0_pm_fini(struct nouveau_object *object, bool suspend)
-{
- struct nvc0_pm_priv *priv = (void *)object;
- nv_mask(priv, 0x000200, 0x10000000, 0x00000000);
- nv_mask(priv, 0x000200, 0x10000000, 0x10000000);
- return nouveau_pm_fini(&priv->base, suspend);
-}
-
-static int
-nvc0_pm_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
- struct nouveau_oclass *oclass, void *data, u32 size,
- struct nouveau_object **pobject)
-{
- struct nvc0_pm_priv *priv;
- u32 mask;
- int ret;
-
- ret = nouveau_pm_create(parent, engine, oclass, &priv);
- *pobject = nv_object(priv);
- if (ret)
- return ret;
-
- ret = nouveau_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0,
- nvc0_pm_pwr);
- if (ret)
- return ret;
-
- /* HUB */
- ret = nouveau_perfdom_new(&priv->base, "hub", 0, 0x1b0000, 0, 0x200,
- nvc0_pm_hub);
- if (ret)
- return ret;
-
- /* GPC */
- mask = (1 << nv_rd32(priv, 0x022430)) - 1;
- mask &= ~nv_rd32(priv, 0x022504);
- mask &= ~nv_rd32(priv, 0x022584);
-
- ret = nouveau_perfdom_new(&priv->base, "gpc", mask, 0x180000,
- 0x1000, 0x200, nvc0_pm_gpc);
- if (ret)
- return ret;
-
- /* PART */
- mask = (1 << nv_rd32(priv, 0x022438)) - 1;
- mask &= ~nv_rd32(priv, 0x022548);
- mask &= ~nv_rd32(priv, 0x0225c8);
-
- ret = nouveau_perfdom_new(&priv->base, "part", mask, 0x1a0000,
- 0x1000, 0x200, nvc0_pm_part);
- if (ret)
- return ret;
-
- nv_engine(priv)->cclass = &nouveau_pm_cclass;
- nv_engine(priv)->sclass = nouveau_pm_sclass;
- priv->base.last = 7;
- return 0;
-}
-
-struct nouveau_oclass
-nvc0_pm_oclass = {
- .handle = NV_ENGINE(PM, 0xc0),
- .ofuncs = &(struct nouveau_ofuncs) {
- .ctor = nvc0_pm_ctor,
- .dtor = _nouveau_pm_dtor,
- .init = _nouveau_pm_init,
- .fini = nvc0_pm_fini,
- },
-};
+++ /dev/null
-#ifndef __NVKM_PM_NVC0_H__
-#define __NVKM_PM_NVC0_H__
-
-#include "priv.h"
-
-struct nvc0_pm_priv {
- struct nouveau_pm base;
-};
-
-struct nvc0_pm_cntr {
- struct nouveau_perfctr base;
-};
-
-extern const struct nouveau_funcdom nvc0_perfctr_func;
-int nvc0_pm_fini(struct nouveau_object *, bool);
-
-#endif
+++ /dev/null
-/*
- * Copyright 2013 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include "nvc0.h"
-
-/*******************************************************************************
- * Perfmon object classes
- ******************************************************************************/
-
-/*******************************************************************************
- * PPM context
- ******************************************************************************/
-
-/*******************************************************************************
- * PPM engine/subdev functions
- ******************************************************************************/
-
-static const struct nouveau_specdom
-nve0_pm_hub[] = {
- { 0x60, (const struct nouveau_specsig[]) {
- { 0x47, "hub00_user_0" },
- {}
- }, &nvc0_perfctr_func },
- { 0x40, (const struct nouveau_specsig[]) {
- { 0x27, "hub01_user_0" },
- {}
- }, &nvc0_perfctr_func },
- { 0x60, (const struct nouveau_specsig[]) {
- { 0x47, "hub02_user_0" },
- {}
- }, &nvc0_perfctr_func },
- { 0x60, (const struct nouveau_specsig[]) {
- { 0x47, "hub03_user_0" },
- {}
- }, &nvc0_perfctr_func },
- { 0x40, (const struct nouveau_specsig[]) {
- { 0x03, "host_mmio_rd" },
- { 0x27, "hub04_user_0" },
- {}
- }, &nvc0_perfctr_func },
- { 0x60, (const struct nouveau_specsig[]) {
- { 0x47, "hub05_user_0" },
- {}
- }, &nvc0_perfctr_func },
- { 0xc0, (const struct nouveau_specsig[]) {
- { 0x74, "host_fb_rd3x" },
- { 0x75, "host_fb_rd3x_2" },
- { 0xa7, "hub06_user_0" },
- {}
- }, &nvc0_perfctr_func },
- { 0x60, (const struct nouveau_specsig[]) {
- { 0x47, "hub07_user_0" },
- {}
- }, &nvc0_perfctr_func },
- {}
-};
-
-static const struct nouveau_specdom
-nve0_pm_gpc[] = {
- { 0xe0, (const struct nouveau_specsig[]) {
- { 0xc7, "gpc00_user_0" },
- {}
- }, &nvc0_perfctr_func },
- {}
-};
-
-static const struct nouveau_specdom
-nve0_pm_part[] = {
- { 0x60, (const struct nouveau_specsig[]) {
- { 0x47, "part00_user_0" },
- {}
- }, &nvc0_perfctr_func },
- { 0x60, (const struct nouveau_specsig[]) {
- { 0x47, "part01_user_0" },
- {}
- }, &nvc0_perfctr_func },
- {}
-};
-
-static int
-nve0_pm_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
- struct nouveau_oclass *oclass, void *data, u32 size,
- struct nouveau_object **pobject)
-{
- struct nvc0_pm_priv *priv;
- u32 mask;
- int ret;
-
- ret = nouveau_pm_create(parent, engine, oclass, &priv);
- *pobject = nv_object(priv);
- if (ret)
- return ret;
-
- /* PDAEMON */
- ret = nouveau_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0,
- nve0_pm_pwr);
- if (ret)
- return ret;
-
- /* HUB */
- ret = nouveau_perfdom_new(&priv->base, "hub", 0, 0x1b0000, 0, 0x200,
- nve0_pm_hub);
- if (ret)
- return ret;
-
- /* GPC */
- mask = (1 << nv_rd32(priv, 0x022430)) - 1;
- mask &= ~nv_rd32(priv, 0x022504);
- mask &= ~nv_rd32(priv, 0x022584);
-
- ret = nouveau_perfdom_new(&priv->base, "gpc", mask, 0x180000,
- 0x1000, 0x200, nve0_pm_gpc);
- if (ret)
- return ret;
-
- /* PART */
- mask = (1 << nv_rd32(priv, 0x022438)) - 1;
- mask &= ~nv_rd32(priv, 0x022548);
- mask &= ~nv_rd32(priv, 0x0225c8);
-
- ret = nouveau_perfdom_new(&priv->base, "part", mask, 0x1a0000,
- 0x1000, 0x200, nve0_pm_part);
- if (ret)
- return ret;
-
- nv_engine(priv)->cclass = &nouveau_pm_cclass;
- nv_engine(priv)->sclass = nouveau_pm_sclass;
- priv->base.last = 7;
- return 0;
-}
-
-struct nouveau_oclass
-nve0_pm_oclass = {
- .handle = NV_ENGINE(PM, 0xe0),
- .ofuncs = &(struct nouveau_ofuncs) {
- .ctor = nve0_pm_ctor,
- .dtor = _nouveau_pm_dtor,
- .init = _nouveau_pm_init,
- .fini = nvc0_pm_fini,
- },
-};
+++ /dev/null
-/*
- * Copyright 2013 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-
-#include "nvc0.h"
-
-/*******************************************************************************
- * Perfmon object classes
- ******************************************************************************/
-
-/*******************************************************************************
- * PPM context
- ******************************************************************************/
-
-/*******************************************************************************
- * PPM engine/subdev functions
- ******************************************************************************/
-
-static int
-nvf0_pm_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
- struct nouveau_oclass *oclass, void *data, u32 size,
- struct nouveau_object **pobject)
-{
- struct nvc0_pm_priv *priv;
- int ret;
-
- ret = nouveau_pm_create(parent, engine, oclass, &priv);
- *pobject = nv_object(priv);
- if (ret)
- return ret;
-
- ret = nouveau_perfdom_new(&priv->base, "pwr", 0, 0, 0, 0,
- nve0_pm_pwr);
- if (ret)
- return ret;
-
- nv_engine(priv)->cclass = &nouveau_pm_cclass;
- nv_engine(priv)->sclass = nouveau_pm_sclass;
- return 0;
-}
-
-struct nouveau_oclass
-nvf0_pm_oclass = {
- .handle = NV_ENGINE(PM, 0xf0),
- .ofuncs = &(struct nouveau_ofuncs) {
- .ctor = nvf0_pm_ctor,
- .dtor = _nouveau_pm_dtor,
- .init = _nouveau_pm_init,
- .fini = nvc0_pm_fini,
- },
-};
#ifndef __NVKM_PM_PRIV_H__
#define __NVKM_PM_PRIV_H__
-
#include <engine/pm.h>
-struct nouveau_perfctr {
- struct nouveau_object base;
+struct nvkm_perfctr {
+ struct nvkm_object base;
struct list_head head;
- struct nouveau_perfsig *signal[4];
+ struct nvkm_perfsig *signal[4];
int slot;
u32 logic_op;
u32 clk;
u32 ctr;
};
-extern struct nouveau_oclass nouveau_pm_sclass[];
+extern struct nvkm_oclass nvkm_pm_sclass[];
+
+#include <core/engctx.h>
-struct nouveau_perfctx {
- struct nouveau_engctx base;
+struct nvkm_perfctx {
+ struct nvkm_engctx base;
};
-extern struct nouveau_oclass nouveau_pm_cclass;
+extern struct nvkm_oclass nvkm_pm_cclass;
-struct nouveau_specsig {
+struct nvkm_specsig {
u8 signal;
const char *name;
};
-struct nouveau_perfsig {
+struct nvkm_perfsig {
const char *name;
};
-struct nouveau_perfdom;
-struct nouveau_perfctr *
-nouveau_perfsig_wrap(struct nouveau_pm *, const char *,
- struct nouveau_perfdom **);
+struct nvkm_perfdom;
+struct nvkm_perfctr *
+nvkm_perfsig_wrap(struct nvkm_pm *, const char *, struct nvkm_perfdom **);
-struct nouveau_specdom {
+struct nvkm_specdom {
u16 signal_nr;
- const struct nouveau_specsig *signal;
- const struct nouveau_funcdom *func;
+ const struct nvkm_specsig *signal;
+ const struct nvkm_funcdom *func;
};
-extern const struct nouveau_specdom nva3_pm_pwr[];
-extern const struct nouveau_specdom nvc0_pm_pwr[];
-extern const struct nouveau_specdom nve0_pm_pwr[];
+extern const struct nvkm_specdom gt215_pm_pwr[];
+extern const struct nvkm_specdom gf100_pm_pwr[];
+extern const struct nvkm_specdom gk104_pm_pwr[];
-struct nouveau_perfdom {
+struct nvkm_perfdom {
struct list_head head;
struct list_head list;
- const struct nouveau_funcdom *func;
+ const struct nvkm_funcdom *func;
char name[32];
u32 addr;
u8 quad;
u32 signal_nr;
- struct nouveau_perfsig signal[];
+ struct nvkm_perfsig signal[];
};
-struct nouveau_funcdom {
- void (*init)(struct nouveau_pm *, struct nouveau_perfdom *,
- struct nouveau_perfctr *);
- void (*read)(struct nouveau_pm *, struct nouveau_perfdom *,
- struct nouveau_perfctr *);
- void (*next)(struct nouveau_pm *, struct nouveau_perfdom *);
+struct nvkm_funcdom {
+ void (*init)(struct nvkm_pm *, struct nvkm_perfdom *,
+ struct nvkm_perfctr *);
+ void (*read)(struct nvkm_pm *, struct nvkm_perfdom *,
+ struct nvkm_perfctr *);
+ void (*next)(struct nvkm_pm *, struct nvkm_perfdom *);
};
-int nouveau_perfdom_new(struct nouveau_pm *, const char *, u32,
- u32, u32, u32, const struct nouveau_specdom *);
+int nvkm_perfdom_new(struct nvkm_pm *, const char *, u32, u32, u32, u32,
+ const struct nvkm_specdom *);
-#define nouveau_pm_create(p,e,o,d) \
- nouveau_pm_create_((p), (e), (o), sizeof(**d), (void **)d)
-#define nouveau_pm_dtor(p) ({ \
- struct nouveau_pm *c = (p); \
- _nouveau_pm_dtor(nv_object(c)); \
+#define nvkm_pm_create(p,e,o,d) \
+ nvkm_pm_create_((p), (e), (o), sizeof(**d), (void **)d)
+#define nvkm_pm_dtor(p) ({ \
+ struct nvkm_pm *c = (p); \
+ _nvkm_pm_dtor(nv_object(c)); \
})
-#define nouveau_pm_init(p) ({ \
- struct nouveau_pm *c = (p); \
- _nouveau_pm_init(nv_object(c)); \
+#define nvkm_pm_init(p) ({ \
+ struct nvkm_pm *c = (p); \
+ _nvkm_pm_init(nv_object(c)); \
})
-#define nouveau_pm_fini(p,s) ({ \
- struct nouveau_pm *c = (p); \
- _nouveau_pm_fini(nv_object(c), (s)); \
+#define nvkm_pm_fini(p,s) ({ \
+ struct nvkm_pm *c = (p); \
+ _nvkm_pm_fini(nv_object(c), (s)); \
})
-int nouveau_pm_create_(struct nouveau_object *, struct nouveau_object *,
- struct nouveau_oclass *, int, void **);
-void _nouveau_pm_dtor(struct nouveau_object *);
-int _nouveau_pm_init(struct nouveau_object *);
-int _nouveau_pm_fini(struct nouveau_object *, bool);
-
+int nvkm_pm_create_(struct nvkm_object *, struct nvkm_object *,
+ struct nvkm_oclass *, int, void **);
+void _nvkm_pm_dtor(struct nvkm_object *);
+int _nvkm_pm_init(struct nvkm_object *);
+int _nvkm_pm_fini(struct nvkm_object *, bool);
#endif
projects / GitHub / moto-9609 / android_kernel_motorola_exynos9610.git / commitdiff