#define USE_SPI_DMA 0 /* johnny add */
-#ifdef WILC_ASIC_A0
- #if defined(PLAT_PANDA_ES_OMAP4460)
- #define MIN_SPEED 12000000
- #define MAX_SPEED 24000000
- #elif defined(PLAT_WMS8304)
- #define MIN_SPEED 12000000
- #define MAX_SPEED 24000000 /* 4000000 */
- #elif defined(CUSTOMER_PLATFORM)
-/*
- TODO : define Clock speed under 48M.
- *
- * ex)
- * #define MIN_SPEED 24000000
- * #define MAX_SPEED 48000000
- */
- #else
- #define MIN_SPEED 24000000
- #define MAX_SPEED 48000000
- #endif
-#else /* WILC_ASIC_A0 */
-/* Limit clk to 6MHz on FPGA. */
- #define MIN_SPEED 6000000
- #define MAX_SPEED 6000000
-#endif /* WILC_ASIC_A0 */
-
-static u32 SPEED = MIN_SPEED;
-
static const struct wilc1000_ops wilc1000_spi_ops;
static int wilc_bus_probe(struct spi_device *spi)
struct spi_transfer tr = {
.tx_buf = b + (i * TXRX_PHASE_SIZE),
.len = TXRX_PHASE_SIZE,
- .speed_hz = SPEED,
.bits_per_word = 8,
.delay_usecs = 0,
};
struct spi_transfer tr = {
.tx_buf = b + (blk * TXRX_PHASE_SIZE),
.len = remainder,
- .speed_hz = SPEED,
.bits_per_word = 8,
.delay_usecs = 0,
};
struct spi_transfer tr = {
.tx_buf = b,
.len = len,
- .speed_hz = SPEED,
.delay_usecs = 0,
};
char *r_buffer = kzalloc(len, GFP_KERNEL);
struct spi_transfer tr = {
.rx_buf = rb + (i * TXRX_PHASE_SIZE),
.len = TXRX_PHASE_SIZE,
- .speed_hz = SPEED,
.bits_per_word = 8,
.delay_usecs = 0,
};
struct spi_transfer tr = {
.rx_buf = rb + (blk * TXRX_PHASE_SIZE),
.len = remainder,
- .speed_hz = SPEED,
.bits_per_word = 8,
.delay_usecs = 0,
};
struct spi_transfer tr = {
.rx_buf = rb,
.len = rlen,
- .speed_hz = SPEED,
.delay_usecs = 0,
};
.rx_buf = rb,
.tx_buf = wb,
.len = rlen,
- .speed_hz = SPEED,
.bits_per_word = 8,
.delay_usecs = 0,
return ret;
}
-
-int wilc_spi_set_max_speed(void)
-{
- SPEED = MAX_SPEED;
-
- PRINT_INFO(BUS_DBG, "@@@@@@@@@@@@ change SPI speed to %d @@@@@@@@@\n", SPEED);
- return 1;
-}
return 1;
}
-static void wilc_spi_max_bus_speed(void)
-{
- wilc_spi_set_max_speed();
-}
-
-static void wilc_spi_default_bus_speed(void)
-{
-}
-
static int wilc_spi_read_size(u32 *size)
{
int ret;
.hif_block_tx_ext = _wilc_spi_write,
.hif_block_rx_ext = _wilc_spi_read,
.hif_sync_ext = wilc_spi_sync_ext,
- .hif_set_max_bus_speed = wilc_spi_max_bus_speed,
- .hif_set_default_bus_speed = wilc_spi_default_bus_speed,
};
int (*hif_block_tx_ext)(u32, u8 *, u32);
int (*hif_block_rx_ext)(u32, u8 *, u32);
int (*hif_sync_ext)(int);
- void (*hif_set_max_bus_speed)(void);
- void (*hif_set_default_bus_speed)(void);
int (*enable_interrupt)(struct wilc *nic);
void (*disable_interrupt)(struct wilc *nic);
};