The powergating and reset handling code needs to differentiate between Tegra
variants. Therefore we export the chipid here.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
int tegra_sku_id;
int tegra_cpu_process_id;
int tegra_core_process_id;
-static int tegra_chip_id;
+int tegra_chip_id;
enum tegra_revision tegra_revision;
/* The BCT to use at boot is specified by board straps that can be read
extern int tegra_sku_id;
extern int tegra_cpu_process_id;
extern int tegra_core_process_id;
+extern int tegra_chip_id;
extern enum tegra_revision tegra_revision;
extern int tegra_bct_strapping;