RealView: Add Cortex-A9 support to the EB board

This patch adds the necessary definitions and Kconfig entries to enable
Cortex-A9 (ARMv7 SMP) tiles on the RealView/EB board.

Signed-off-by: Jon Callan <Jon.Callan@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5021db2217eddfbecd628aba53ca44f6fb62ade9..fc022f06979f21af63cf959179f715c5c9aa1459 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -782,7 +782,7 @@ config HOTPLUG_CPU
 
 config LOCAL_TIMERS
        bool "Use local timer interrupts"
-       depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP)
+       depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || REALVIEW_EB_A9MP)
        default y
        help
          Enable support for local timers on SMP platforms, rather then the

diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index 8032f234c143857a791f1d5e52f0bb61d6017243..eebf7ec9a1563501afbacd00def622129151eda4 100644 (file)
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -7,6 +7,13 @@ config MACH_REALVIEW_EB
        help
          Include support for the ARM(R) RealView Emulation Baseboard platform.
 
+config REALVIEW_EB_A9MP
+       bool "Support Multicore Cortex-A9"
+       depends on MACH_REALVIEW_EB
+       select CPU_V7
+       help
+         Enable support for the Cortex-A9MPCore tile on the Realview platform.
+
 config REALVIEW_EB_ARM11MP
        bool "Support ARM11MPCore tile"
        depends on MACH_REALVIEW_EB

diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index 8d699fd324d0a559b5bfb1a1638c3603d4154cb3..e1a6df29eaf6e3451e01852648c21ed6634c4f96 100644 (file)
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -163,7 +163,7 @@
 #define NR_IRQS                        NR_IRQS_EB
 #endif
 
-#if defined(CONFIG_REALVIEW_EB_ARM11MP) \
+#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
        && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
 #undef MAX_GIC_NR
 #define MAX_GIC_NR             NR_GIC_EB11MP
@@ -177,6 +177,7 @@
 #define REALVIEW_EB_PROC_ARM9          0x02000000
 #define REALVIEW_EB_PROC_ARM11         0x04000000
 #define REALVIEW_EB_PROC_ARM11MP       0x06000000
+#define REALVIEW_EB_PROC_A9MP          0x0C000000
 
 #define check_eb_proc(proc_type)                                               \
        ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK)     \
@@ -188,4 +189,10 @@
 #define core_tile_eb11mp()     0
 #endif
 
+#ifdef CONFIG_REALVIEW_EB_A9MP
+#define core_tile_a9mp()       check_eb_proc(REALVIEW_EB_PROC_A9MP)
+#else
+#define core_tile_a9mp()       0
+#endif
+
 #endif /* __ASM_ARCH_BOARD_EB_H */

diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index e102aeb0f76e8d6abdd69e8458b12a11d597a3ce..8dcb085dca4e1fbf58f2dcb1906b99c552787bcb 100644 (file)
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -36,7 +36,8 @@ static unsigned int __init get_core_count(void)
        unsigned int ncores;
        void __iomem *scu_base = 0;
 
-       if (machine_is_realview_eb() && core_tile_eb11mp())
+       if (machine_is_realview_eb() &&
+           (core_tile_eb11mp() || core_tile_a9mp()))
                scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
        else if (machine_is_realview_pb11mp())
                scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
@@ -58,7 +59,8 @@ static void scu_enable(void)
        u32 scu_ctrl;
        void __iomem *scu_base;
 
-       if (machine_is_realview_eb() && core_tile_eb11mp())
+       if (machine_is_realview_eb() &&
+           (core_tile_eb11mp() || core_tile_a9mp()))
                scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
        else if (machine_is_realview_pb11mp())
                scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
@@ -88,7 +90,8 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
         * core (e.g. timer irq), then they will not have been enabled
         * for us: do so
         */
-       if (machine_is_realview_eb() && core_tile_eb11mp())
+       if (machine_is_realview_eb() &&
+           (core_tile_eb11mp() || core_tile_a9mp()))
                gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
        else if (machine_is_realview_pb11mp())
                gic_cpu_init(0, __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
@@ -232,7 +235,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
         * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
         * realview_timer_init
         */
-       if ((machine_is_realview_eb() && core_tile_eb11mp()) ||
+       if ((machine_is_realview_eb() &&
+            (core_tile_eb11mp() || core_tile_a9mp())) ||
            machine_is_realview_pb11mp())
                local_timer_setup(cpu);
 #endif

diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index f6e04edf922df41d3f8d59cca92d72c7d96bcd2b..3adb535629857478f5d6e4779f7f4fd3509ca911 100644 (file)
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -108,7 +108,7 @@ static struct map_desc realview_eb11mp_io_desc[] __initdata = {
 static void __init realview_eb_map_io(void)
 {
        iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
-       if (core_tile_eb11mp())
+       if (core_tile_eb11mp() || core_tile_a9mp())
                iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
 }
 
@@ -274,7 +274,7 @@ static int eth_device_register(void)
 
 static void __init gic_init_irq(void)
 {
-       if (core_tile_eb11mp()) {
+       if (core_tile_eb11mp() || core_tile_a9mp()) {
                unsigned int pldctrl;
 
                /* new irq mode */
@@ -342,7 +342,7 @@ static void __init realview_eb_timer_init(void)
        timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
        timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
 
-       if (core_tile_eb11mp()) {
+       if (core_tile_eb11mp() || core_tile_a9mp()) {
 #ifdef CONFIG_LOCAL_TIMERS
                twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE);
                twd_size = REALVIEW_EB11MP_TWD_SIZE;
@@ -362,7 +362,7 @@ static void __init realview_eb_init(void)
 {
        int i;
 
-       if (core_tile_eb11mp()) {
+       if (core_tile_eb11mp() || core_tile_a9mp()) {
                realview_eb11mp_fixup();
 
 #ifdef CONFIG_CACHE_L2X0

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index ab5f7a21350b3af41bd6a227d1920f09c8091ed1..37f71066f0866dc622031670f8bdc9fb0a157fe7 100644 (file)
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -745,7 +745,7 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
 
 config CACHE_L2X0
        bool "Enable the L2x0 outer cache controller"
-       depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176
+       depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || REALVIEW_EB_A9MP
        default y
        select OUTER_CACHE
        help