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ARM: imx6: Align ssi nodes between mx6 variants
authorFabio Estevam <fabio.estevam@freescale.com>
Mon, 7 Jul 2014 13:04:52 +0000 (10:04 -0300)
committerShawn Guo <shawn.guo@freescale.com>
Fri, 18 Jul 2014 08:49:44 +0000 (16:49 +0800)
Since commit 98ea6ad2edd2 (ARM: dts: imx6: use imx51-ssi) the mx6 ssi is
compatible with imx51, so align all the mx6 variant ssi compatible strings as:

compatible = "fsl,<imx6-soc>-ssi", "fsl,imx51-ssi";

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
arch/arm/boot/dts/imx6qdl.dtsi patch | blob | blame | history
arch/arm/boot/dts/imx6sl.dtsi patch | blob | blame | history
arch/arm/boot/dts/imx6sx.dtsi patch | blob | blame | history

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index d7c97d95c525bd3d519a09ac3fad6d73bd46d96e..c701af9580067d287cc0bffbc0afe074c8ddab7d 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -274,8 +274,7 @@
 
                                ssi1: ssi@02028000 {
                                        compatible = "fsl,imx6q-ssi",
-                                                       "fsl,imx51-ssi",
-                                                       "fsl,imx21-ssi";
+                                                       "fsl,imx51-ssi";
                                        reg = <0x02028000 0x4000>;
                                        interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6QDL_CLK_SSI1_IPG>;
@@ -288,8 +287,7 @@
 
                                ssi2: ssi@0202c000 {
                                        compatible = "fsl,imx6q-ssi",
-                                                       "fsl,imx51-ssi",
-                                                       "fsl,imx21-ssi";
+                                                       "fsl,imx51-ssi";
                                        reg = <0x0202c000 0x4000>;
                                        interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6QDL_CLK_SSI2_IPG>;
@@ -302,8 +300,7 @@
 
                                ssi3: ssi@02030000 {
                                        compatible = "fsl,imx6q-ssi",
-                                                       "fsl,imx51-ssi",
-                                                       "fsl,imx21-ssi";
+                                                       "fsl,imx51-ssi";
                                        reg = <0x02030000 0x4000>;
                                        interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6QDL_CLK_SSI3_IPG>;
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 0467ac064e9d75221f8a0cf2c6b063d54aa44cb3..c75800ca8b355fbdf2da2d3ee62e346078948811 100644 (file)
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -227,8 +227,7 @@
 
                                ssi1: ssi@02028000 {
                                        compatible = "fsl,imx6sl-ssi",
-                                                       "fsl,imx51-ssi",
-                                                       "fsl,imx21-ssi";
+                                                       "fsl,imx51-ssi";
                                        reg = <0x02028000 0x4000>;
                                        interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_SSI1>;
@@ -241,8 +240,7 @@
 
                                ssi2: ssi@0202c000 {
                                        compatible = "fsl,imx6sl-ssi",
-                                                       "fsl,imx51-ssi",
-                                                       "fsl,imx21-ssi";
+                                                       "fsl,imx51-ssi";
                                        reg = <0x0202c000 0x4000>;
                                        interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_SSI2>;
@@ -255,8 +253,7 @@
 
                                ssi3: ssi@02030000 {
                                        compatible = "fsl,imx6sl-ssi",
-                                                       "fsl,imx51-ssi",
-                                                       "fsl,imx21-ssi";
+                                                       "fsl,imx51-ssi";
                                        reg = <0x02030000 0x4000>;
                                        interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_SSI3>;
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 0c5094adedfa8fa70aa2e8124b998aa2591c5db2..f4b9da65bc0f19e65ed1c2aa71cb1f11f447757c 100644 (file)
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -298,7 +298,7 @@
                                };
 
                                ssi1: ssi@02028000 {
-                                       compatible = "fsl,imx6sx-ssi", "fsl,imx21-ssi";
+                                       compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
                                        reg = <0x02028000 0x4000>;
                                        interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SX_CLK_SSI1_IPG>,
@@ -311,7 +311,7 @@
                                };
 
                                ssi2: ssi@0202c000 {
-                                       compatible = "fsl,imx6sx-ssi", "fsl,imx21-ssi";
+                                       compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
                                        reg = <0x0202c000 0x4000>;
                                        interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SX_CLK_SSI2_IPG>,
@@ -324,7 +324,7 @@
                                };
 
                                ssi3: ssi@02030000 {
-                                       compatible = "fsl,imx6sx-ssi", "fsl,imx21-ssi";
+                                       compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
                                        reg = <0x02030000 0x4000>;
                                        interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SX_CLK_SSI3_IPG>,