x86, tboot: Add support for S3 memory integrity protection

This patch adds support for S3 memory integrity protection within an Intel(R)
TXT launched kernel, for all kernel and userspace memory.  All RAM used by the
kernel and userspace, as indicated by memory ranges of type E820_RAM and
E820_RESERVED_KERN in the e820 table, will be integrity protected.

The MAINTAINERS file is also updated to reflect the maintainers of the
TXT-related code.

All MACing is done in tboot, based on a complexity analysis and tradeoff.

v3: Compared with v2, this patch adds a check of array size in
tboot.c, and a note to specify which c/s of tboot supports this kind
of MACing in intel_txt.txt.

Signed-off-by: Shane Wang <shane.wang@intel.com>
LKML-Reference: <4B973DDA.6050902@intel.com>
Signed-off-by: Joseph Cihula <joseph.cihula@intel.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>

diff --git a/Documentation/intel_txt.txt b/Documentation/intel_txt.txt
index f40a1f030019d46867d79e0c3f2b4ce58a854545..87c8990dbbd97d2c4fd535f4dd33fa1844eff436 100644 (file)
--- a/Documentation/intel_txt.txt
+++ b/Documentation/intel_txt.txt
@@ -161,13 +161,15 @@ o  In order to put a system into any of the sleep states after a TXT
       has been restored, it will restore the TPM PCRs and then
       transfer control back to the kernel's S3 resume vector.
       In order to preserve system integrity across S3, the kernel
-      provides tboot with a set of memory ranges (kernel
-      code/data/bss, S3 resume code, and AP trampoline) that tboot
-      will calculate a MAC (message authentication code) over and then
-      seal with the TPM.  On resume and once the measured environment
-      has been re-established, tboot will re-calculate the MAC and
-      verify it against the sealed value.  Tboot's policy determines
-      what happens if the verification fails.
+      provides tboot with a set of memory ranges (RAM and RESERVED_KERN
+      in the e820 table, but not any memory that BIOS might alter over
+      the S3 transition) that tboot will calculate a MAC (message
+      authentication code) over and then seal with the TPM. On resume
+      and once the measured environment has been re-established, tboot
+      will re-calculate the MAC and verify it against the sealed value.
+      Tboot's policy determines what happens if the verification fails.
+      Note that the c/s 194 of tboot which has the new MAC code supports
+      this.
 
 That's pretty much it for TXT support.
 

diff --git a/MAINTAINERS b/MAINTAINERS
index 47cc449d89d89746b1dba3cda6aae88afe1bf990..d3072cb8805d25058e73ffe995c82312d1975e73 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2940,6 +2940,17 @@ S:       Odd Fixes
 F:     Documentation/networking/README.ipw2200
 F:     drivers/net/wireless/ipw2x00/ipw2200.*
 
+INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT)
+M:     Joseph Cihula <joseph.cihula@intel.com>
+M:     Shane Wang <shane.wang@intel.com>
+L:     tboot-devel@lists.sourceforge.net
+W:     http://tboot.sourceforge.net
+T:     Mercurial http://www.bughost.org/repos.hg/tboot.hg
+S:     Supported
+F:     Documentation/intel_txt.txt
+F:     include/linux/tboot.h
+F:     arch/x86/kernel/tboot.c
+
 INTEL WIRELESS WIMAX CONNECTION 2400
 M:     Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
 M:     linux-wimax@intel.com

diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index 0e22296790d31e4efa444c589eb9d14596ff33d1..ec8a52d14ab179e4ef086e9c65c5a28917cdfd70 100644 (file)
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -45,7 +45,12 @@
 #define E820_NVS       4
 #define E820_UNUSABLE  5
 
-/* reserved RAM used by kernel itself */
+/*
+ * reserved RAM used by kernel itself
+ * if CONFIG_INTEL_TXT is enabled, memory of this type will be
+ * included in the S3 integrity calculation and so should not include
+ * any memory that BIOS might alter over the S3 transition
+ */
 #define E820_RESERVED_KERN        128
 
 #ifndef __ASSEMBLY__

diff --git a/arch/x86/kernel/tboot.c b/arch/x86/kernel/tboot.c
index 86c9f91b48aea8ef47f0e77372fcf2d5f822d77e..cc2c60474fd06562a31269c3eeb10eae18b9847d 100644 (file)
--- a/arch/x86/kernel/tboot.c
+++ b/arch/x86/kernel/tboot.c
@@ -175,6 +175,9 @@ static void add_mac_region(phys_addr_t start, unsigned long size)
        struct tboot_mac_region *mr;
        phys_addr_t end = start + size;
 
+       if (tboot->num_mac_regions >= MAX_TB_MAC_REGIONS)
+               panic("tboot: Too many MAC regions\n");
+
        if (start && size) {
                mr = &tboot->mac_regions[tboot->num_mac_regions++];
                mr->start = round_down(start, PAGE_SIZE);
@@ -184,18 +187,17 @@ static void add_mac_region(phys_addr_t start, unsigned long size)
 
 static int tboot_setup_sleep(void)
 {
+       int i;
+
        tboot->num_mac_regions = 0;
 
-       /* S3 resume code */
-       add_mac_region(acpi_wakeup_address, WAKEUP_SIZE);
+       for (i = 0; i < e820.nr_map; i++) {
+               if ((e820.map[i].type != E820_RAM)
+                && (e820.map[i].type != E820_RESERVED_KERN))
+                       continue;
 
-#ifdef CONFIG_X86_TRAMPOLINE
-       /* AP trampoline code */
-       add_mac_region(virt_to_phys(trampoline_base), TRAMPOLINE_SIZE);
-#endif
-
-       /* kernel code + data + bss */
-       add_mac_region(virt_to_phys(_text), _end - _text);
+               add_mac_region(e820.map[i].addr, e820.map[i].size);
+       }
 
        tboot->acpi_sinfo.kernel_s3_resume_vector = acpi_wakeup_address;