cpufreq: intel_pstate: Disable interrupts during MSRs reading
authorStratos Karafotis <stratosk@semaphore.gr>
Fri, 18 Jul 2014 15:37:24 +0000 (08:37 -0700)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Mon, 21 Jul 2014 11:43:18 +0000 (13:43 +0200)
According to Intel 64 and IA-32 Architectures SDM, Volume 3,
Chapter 14.2, "Software needs to exercise care to avoid delays
between the two RDMSRs (for example interrupts)".

So, disable interrupts during reading MSRs IA32_APERF and IA32_MPERF.
This should increase the accuracy of the calculations.

Signed-off-by: Stratos Karafotis <stratosk@semaphore.gr>
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
drivers/cpufreq/intel_pstate.c

index 9d75bd6faf65fcca1f5dc30c52edf17f863d995c..ff3c5624972c372c251a6864447fb82bfd570001 100644 (file)
@@ -577,9 +577,12 @@ static inline void intel_pstate_calc_busy(struct cpudata *cpu)
 static inline void intel_pstate_sample(struct cpudata *cpu)
 {
        u64 aperf, mperf;
+       unsigned long flags;
 
+       local_irq_save(flags);
        rdmsrl(MSR_IA32_APERF, aperf);
        rdmsrl(MSR_IA32_MPERF, mperf);
+       local_irq_restore(flags);
 
        aperf = aperf >> FRAC_BITS;
        mperf = mperf >> FRAC_BITS;