media: mfc: change USE_LTR setting

The control value of USE_LTR consists of a bitmap.
If setting value is 0x3, it means that index 0 or 1 frame are referenced.
To support this, the range of the control value was extended.

Change-Id: I00481d313f97e94a9d141487811970d2d8d78c2f
Signed-off-by: Jeonghee Kim <jhhhh.kim@samsung.com>

diff --git a/drivers/media/platform/exynos/mfc/s5p_mfc_common.h b/drivers/media/platform/exynos/mfc/s5p_mfc_common.h
index 58c5fd8b74c4620cea9d825e4f7ed8305003c7ff..b6621ac517ef377916b62f98f96869a7558bc55d 100644 (file)
--- a/drivers/media/platform/exynos/mfc/s5p_mfc_common.h
+++ b/drivers/media/platform/exynos/mfc/s5p_mfc_common.h
@@ -28,7 +28,7 @@
 #include "exynos_mfc_media.h"
 #include "s5p_mfc_data_struct.h"
 
-#define MFC_DRIVER_INFO                170522
+#define MFC_DRIVER_INFO                180315
 
 #define MFC_MAX_REF_BUFS       2
 #define MFC_FRAME_PLANES       2

diff --git a/drivers/media/platform/exynos/mfc/s5p_mfc_enc_internal.h b/drivers/media/platform/exynos/mfc/s5p_mfc_enc_internal.h
index c337e23cf10367f39b77a0441b9303ee2158b1b3..955fb964d0f6e3264de5f4285441da08564d9992 100644 (file)
--- a/drivers/media/platform/exynos/mfc/s5p_mfc_enc_internal.h
+++ b/drivers/media/platform/exynos/mfc/s5p_mfc_enc_internal.h
@@ -1828,7 +1828,7 @@ static struct v4l2_queryctrl controls[] = {
                .type = V4L2_CTRL_TYPE_INTEGER,
                .name = "Specify a LTRP for encoding",
                .minimum = 0,
-               .maximum = 4,
+               .maximum = 0xF,
                .step = 1,
                .default_value = 0,
        },

diff --git a/drivers/media/platform/exynos/mfc/s5p_mfc_enc_ops.c b/drivers/media/platform/exynos/mfc/s5p_mfc_enc_ops.c
index 4f8e21375d692d94109ec9b99b0fba1e8c87f683..aea21a93f0914f41169fa5fbce922080e076e96e 100644 (file)
--- a/drivers/media/platform/exynos/mfc/s5p_mfc_enc_ops.c
+++ b/drivers/media/platform/exynos/mfc/s5p_mfc_enc_ops.c
@@ -1124,9 +1124,9 @@ static void mfc_enc_set_buf_ctrls_exception(struct s5p_mfc_ctx *ctx,
        }
        if (buf_ctrl->id == V4L2_CID_MPEG_MFC_H264_USE_LTR) {
                value = MFC_READL(S5P_FIMV_E_H264_NAL_CONTROL);
-               buf_ctrl->old_val2 = (value >> 11) & 0x7;
-               value &= ~(0x7 << 11);
-               value |= (buf_ctrl->val & 0x7) << 11;
+               buf_ctrl->old_val2 = (value >> 11) & 0xF;
+               value &= ~(0xF << 11);
+               value |= (buf_ctrl->val & 0xF) << 11;
                MFC_WRITEL(value, S5P_FIMV_E_H264_NAL_CONTROL);
        }
 
@@ -1430,8 +1430,8 @@ static int s5p_mfc_enc_set_buf_ctrls_val_nal_q_enc(struct s5p_mfc_ctx *ctx,
                        pInStr->H264NalControl &= ~(buf_ctrl->mask << buf_ctrl->shft);
                        pInStr->H264NalControl |=
                                (buf_ctrl->val & buf_ctrl->mask) << buf_ctrl->shft;
-                       pInStr->H264NalControl &= ~(0x7 << 11);
-                       pInStr->H264NalControl |= (buf_ctrl->val & 0x7) << 11;
+                       pInStr->H264NalControl &= ~(0xF << 11);
+                       pInStr->H264NalControl |= (buf_ctrl->val & 0xF) << 11;
                        break;
                case V4L2_CID_MPEG_MFC_H264_BASE_PRIORITY:
                        for (i = 0; i < (p->codec.h264.num_hier_layer & 0x7); i++)
@@ -1617,8 +1617,8 @@ static int s5p_mfc_enc_recover_buf_ctrls_val(struct s5p_mfc_ctx *ctx,
                }
                if (buf_ctrl->id == V4L2_CID_MPEG_MFC_H264_USE_LTR) {
                        value = MFC_READL(S5P_FIMV_E_H264_NAL_CONTROL);
-                       value &= ~(0x7 << 11);
-                       value |= (buf_ctrl->old_val2 & 0x7) << 11;
+                       value &= ~(0xF << 11);
+                       value |= (buf_ctrl->old_val2 & 0xF) << 11;
                        MFC_WRITEL(value, S5P_FIMV_E_H264_NAL_CONTROL);
                }
                buf_ctrl->updated = 0;