mlx5: Enable mutual support for IB and Ethernet
authorHaggai Abramonvsky <hagaya@mellanox.com>
Thu, 4 Jun 2015 16:30:48 +0000 (19:30 +0300)
committerDavid S. Miller <davem@davemloft.net>
Thu, 4 Jun 2015 23:41:02 +0000 (16:41 -0700)
Ethernet functionality is only available when working in ISSI > 0 mode.

Previously, the IB driver wasn't ready to work on that mode, and hence
building both the IB driver and the Ethernet functionality in the core
driver were disallowed by Kconfigs.

Now, once we have all the pre-steps in place, we can remove this limitation.

The last steps in the IB driver for getting that setup to work are:
create dummy SRQ for the driver's use (until now we could use XRC_SRQ
as SRQ and XRC_SRQ, after moving to ISSI > 0, we separate XRC SRQs from
basic SRQs) and adapt the create QP function to be compatible with ISSI > 0.

Signed-off-by: Haggai Abramovsky <hagaya@mellanox.com>
Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/infiniband/hw/mlx5/main.c
drivers/infiniband/hw/mlx5/mlx5_ib.h
drivers/infiniband/hw/mlx5/qp.c
drivers/net/ethernet/mellanox/mlx5/core/Kconfig
drivers/net/ethernet/mellanox/mlx5/core/qp.c

index f82969257332c21a95435a0fe96bff622f0d3f31..d4dea86052d6b0cbb4dffc89d58053df256a5798 100644 (file)
@@ -1324,8 +1324,29 @@ static int create_dev_resources(struct mlx5_ib_resources *devr)
        atomic_inc(&devr->p0->usecnt);
        atomic_set(&devr->s0->usecnt, 0);
 
+       memset(&attr, 0, sizeof(attr));
+       attr.attr.max_sge = 1;
+       attr.attr.max_wr = 1;
+       attr.srq_type = IB_SRQT_BASIC;
+       devr->s1 = mlx5_ib_create_srq(devr->p0, &attr, NULL);
+       if (IS_ERR(devr->s1)) {
+               ret = PTR_ERR(devr->s1);
+               goto error5;
+       }
+       devr->s1->device        = &dev->ib_dev;
+       devr->s1->pd            = devr->p0;
+       devr->s1->uobject       = NULL;
+       devr->s1->event_handler = NULL;
+       devr->s1->srq_context   = NULL;
+       devr->s1->srq_type      = IB_SRQT_BASIC;
+       devr->s1->ext.xrc.cq    = devr->c0;
+       atomic_inc(&devr->p0->usecnt);
+       atomic_set(&devr->s0->usecnt, 0);
+
        return 0;
 
+error5:
+       mlx5_ib_destroy_srq(devr->s0);
 error4:
        mlx5_ib_dealloc_xrcd(devr->x1);
 error3:
@@ -1340,6 +1361,7 @@ error0:
 
 static void destroy_dev_resources(struct mlx5_ib_resources *devr)
 {
+       mlx5_ib_destroy_srq(devr->s1);
        mlx5_ib_destroy_srq(devr->s0);
        mlx5_ib_dealloc_xrcd(devr->x0);
        mlx5_ib_dealloc_xrcd(devr->x1);
index f731b2592a36ccd07ec09ee20648a2fc1ad4ee89..873dc354766a81c001c50cfd60bab1980c8e6fa5 100644 (file)
@@ -415,6 +415,7 @@ struct mlx5_ib_resources {
        struct ib_xrcd  *x1;
        struct ib_pd    *p0;
        struct ib_srq   *s0;
+       struct ib_srq   *s1;
 };
 
 struct mlx5_ib_dev {
index 15fd485d1ad99b085cdf971bc8bb28c618c07c4d..203c8a45e095560b146859e464eb0a33933c474a 100644 (file)
@@ -1012,7 +1012,8 @@ static int create_qp_common(struct mlx5_ib_dev *dev, struct ib_pd *pd,
                        in->ctx.rq_type_srqn |= cpu_to_be32(to_msrq(init_attr->srq)->msrq.srqn);
                } else {
                        in->ctx.xrcd = cpu_to_be32(to_mxrcd(devr->x1)->xrcdn);
-                       in->ctx.rq_type_srqn |= cpu_to_be32(to_msrq(devr->s0)->msrq.srqn);
+                       in->ctx.rq_type_srqn |=
+                               cpu_to_be32(to_msrq(devr->s1)->msrq.srqn);
                }
        }
 
index 0d7aef040fb0878a6717643cd0ccec42280dfd7b..158c88c69ef91ce9e18db6441e0be176c0aaeba3 100644 (file)
@@ -12,7 +12,7 @@ config MLX5_CORE
 
 config MLX5_CORE_EN
        bool "Mellanox Technologies ConnectX-4 Ethernet support"
-       depends on MLX5_INFINIBAND=n && NETDEVICES && ETHERNET && PCI && MLX5_CORE
+       depends on NETDEVICES && ETHERNET && PCI && MLX5_CORE
        default n
        ---help---
          Ethernet support in Mellanox Technologies ConnectX-4 NIC.
index dc7dbf7e9d98f28d83d55b6632ec44fe4275d9ce..8b494b5622631f3ecd5a625be835cd8116c29d50 100644 (file)
@@ -187,10 +187,17 @@ int mlx5_core_create_qp(struct mlx5_core_dev *dev,
        struct mlx5_destroy_qp_mbox_in din;
        struct mlx5_destroy_qp_mbox_out dout;
        int err;
+       void *qpc;
 
        memset(&out, 0, sizeof(out));
        in->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_CREATE_QP);
 
+       if (dev->issi) {
+               qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
+               /* 0xffffff means we ask to work with cqe version 0 */
+               MLX5_SET(qpc, qpc, user_index, 0xffffff);
+       }
+
        err = mlx5_cmd_exec(dev, in, inlen, &out, sizeof(out));
        if (err) {
                mlx5_core_warn(dev, "ret %d\n", err);