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net/mlx5e: Add missing 50G baseSR2 link mode
authorGal Pressman <galp@mellanox.com>
Thu, 23 Jun 2016 14:02:44 +0000 (17:02 +0300)
committerDavid S. Miller <davem@davemloft.net>
Mon, 27 Jun 2016 08:10:41 +0000 (04:10 -0400)
Add MLX5E_50GBASE_SR2 as ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT.

Signed-off-by: Gal Pressman <galp@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Cc: Ben Hutchings <bwh@kernel.org>
Cc: David Decotigny <decot@googlers.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlx5/core/en.h patch | blob | blame | history

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h
index aa36a3a65e72a08047ded5a80f9a0621cf17ecad..b8732e6d2b6b8f6c1f8876ddbab6c3a75fd157b7 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h
@@ -616,6 +616,7 @@ enum mlx5e_link_mode {
        MLX5E_10GBASE_ER         = 14,
        MLX5E_40GBASE_SR4        = 15,
        MLX5E_40GBASE_LR4        = 16,
+       MLX5E_50GBASE_SR2        = 18,
        MLX5E_100GBASE_CR4       = 20,
        MLX5E_100GBASE_SR4       = 21,
        MLX5E_100GBASE_KR4       = 22,