The two clocks present on the Integrator/AP baseboard and
accessible through its system controller is the PCIv3 bridge
clock and the PCI bus clock. Define the proper device tree
nodes for these.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
interrupt-parent = <&pic>;
/* These are the logical module IRQs */
interrupts = <9>, <10>, <11>, <12>;
+
+ /*
+ * SYSCLK clocks PCIv3 bridge, system controller and the
+ * logic modules.
+ */
+ sysclk: apsys@24M {
+ compatible = "arm,syscon-icst525-integratorap-sys";
+ #clock-cells = <0>;
+ lock-offset = <0x1c>;
+ vco-offset = <0x04>;
+ clocks = <&xtal24mhz>;
+ };
+
+ /* One-bit control for the PCI bus clock (33 or 25 MHz) */
+ pciclk: pciclk@24M {
+ compatible = "arm,syscon-icst525-integratorap-pci";
+ #clock-cells = <0>;
+ lock-offset = <0x1c>;
+ vco-offset = <0x04>;
+ clocks = <&xtal24mhz>;
+ };
};
timer0: timer@13000000 {