ARM: dts: Add nodes for spi controllers for SAMSUNG EXYNOS4 platforms
authorThomas Abraham <thomas.abraham@linaro.org>
Sat, 14 Jul 2012 01:45:32 +0000 (10:45 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Sat, 14 Jul 2012 01:57:10 +0000 (10:57 +0900)
Add device nodes for the three instances of spi controllers in
EXYNOS4 platforms. Enable instance SPI 2 for SMDKV310 board and
disable all spi instances for Origen board.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/boot/dts/exynos4210-origen.dts
arch/arm/boot/dts/exynos4210-smdkv310.dts
arch/arm/boot/dts/exynos4210.dtsi

index b8c476384eef92d8ec7d44eac1d5e275a84e4de1..0c49caa099786b4c247831da4b539da7a32711ab 100644 (file)
        i2c@138D0000 {
                status = "disabled";
        };
+
+       spi_0: spi@13920000 {
+               status = "disabled";
+       };
+
+       spi_1: spi@13930000 {
+               status = "disabled";
+       };
+
+       spi_2: spi@13940000 {
+               status = "disabled";
+       };
 };
index 27afc8e535ca69618de7a10c9fabb5a35983f2a4..1beccc8f14ff948c622a6af681141221139ba021 100644 (file)
        i2c@138D0000 {
                status = "disabled";
        };
+
+       spi_0: spi@13920000 {
+               status = "disabled";
+       };
+
+       spi_1: spi@13930000 {
+               status = "disabled";
+       };
+
+       spi_2: spi@13940000 {
+               gpios = <&gpc1 1 5 3 0>,
+                       <&gpc1 3 5 3 0>,
+                       <&gpc1 4 5 3 0>;
+
+               w25x80@0 {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "w25x80";
+                       reg = <0>;
+                       spi-max-frequency = <1000000>;
+
+                       controller-data {
+                               cs-gpio = <&gpc1 2 1 0 3>;
+                               samsung,spi-feedback-delay = <0>;
+                       };
+
+                       partition@0 {
+                               label = "U-Boot";
+                               reg = <0x0 0x40000>;
+                               read-only;
+                       };
+
+                       partition@40000 {
+                               label = "Kernel";
+                               reg = <0x40000 0xc0000>;
+                       };
+               };
+       };
 };
index 2707f0ec04b11ac68ea18326b13f573395e8ec14..6904d9dfbf28a9d36b4bd189082a859b6da3a52e 100644 (file)
        compatible = "samsung,exynos4210";
        interrupt-parent = <&gic>;
 
+       aliases {
+               spi0 = &spi_0;
+               spi1 = &spi_1;
+               spi2 = &spi_2;
+       };
+
        gic:interrupt-controller@10490000 {
                compatible = "arm,cortex-a9-gic";
                #interrupt-cells = <3>;
                interrupts = <0 65 0>;
        };
 
+       spi_0: spi@13920000 {
+               compatible = "samsung,exynos4210-spi";
+               reg = <0x13920000 0x100>;
+               interrupts = <0 66 0>;
+               tx-dma-channel = <&pdma0 7>;
+               rx-dma-channel = <&pdma0 6>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+
+       spi_1: spi@13930000 {
+               compatible = "samsung,exynos4210-spi";
+               reg = <0x13930000 0x100>;
+               interrupts = <0 67 0>;
+               tx-dma-channel = <&pdma1 7>;
+               rx-dma-channel = <&pdma1 6>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+
+       spi_2: spi@13940000 {
+               compatible = "samsung,exynos4210-spi";
+               reg = <0x13940000 0x100>;
+               interrupts = <0 68 0>;
+               tx-dma-channel = <&pdma0 9>;
+               rx-dma-channel = <&pdma0 8>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+
        amba {
                #address-cells = <1>;
                #size-cells = <1>;