ARM: OMAP2+: Allow NAND transfer mode to be specified in DT

OMAP devices support various NAND transfer modes.

Currently all device-tree definitions will use the default "prefetch
polled" mode, so this patch enables the transfer mode to be specified
in the device-tree.

Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Acked-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
index 6a983c1d87cddfd97b39ec195e176ccf1ca14bb6..df338cb5059c53993e31fa7a3447306f2018d9ff 100644 (file)
--- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
@@ -29,6 +29,13 @@ Optional properties:
                "bch4"          4-bit BCH ecc code
                "bch8"          8-bit BCH ecc code
 
+ - ti,nand-xfer-type:          A string setting the data transfer type. One of:
+
+               "prefetch-polled"       Prefetch polled mode (default)
+               "polled"                Polled mode, without prefetch
+               "prefetch-dma"          Prefetch enabled sDMA mode
+               "prefetch-irq"          Prefetch enabled irq mode
+
  - elm_id:     Specifies elm device node. This is required to support BCH
                error correction using ELM module.
 
@@ -55,6 +62,7 @@ Example for an AM33xx board:
                        reg = <0 0 0>; /* CS0, offset 0 */
                        nand-bus-width = <16>;
                        ti,nand-ecc-opt = "bch8";
+                       ti,nand-xfer-type = "polled";
 
                        gpmc,sync-clk-ps = <0>;
                        gpmc,cs-on-ns = <0>;

diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 6c4da1254f5395d31ac32fdb5a836297703208f6..a195468286f4bd265c856f888f64315dbd40eca3 100644 (file)
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1345,6 +1345,13 @@ static const char * const nand_ecc_opts[] = {
        [OMAP_ECC_BCH8_CODE_HW]                 = "bch8",
 };
 
+static const char * const nand_xfer_types[] = {
+       [NAND_OMAP_PREFETCH_POLLED]             = "prefetch-polled",
+       [NAND_OMAP_POLLED]                      = "polled",
+       [NAND_OMAP_PREFETCH_DMA]                = "prefetch-dma",
+       [NAND_OMAP_PREFETCH_IRQ]                = "prefetch-irq",
+};
+
 static int gpmc_probe_nand_child(struct platform_device *pdev,
                                 struct device_node *child)
 {
@@ -1374,6 +1381,13 @@ static int gpmc_probe_nand_child(struct platform_device *pdev,
                                break;
                        }
 
+       if (!of_property_read_string(child, "ti,nand-xfer-type", &s))
+               for (val = 0; val < ARRAY_SIZE(nand_xfer_types); val++)
+                       if (!strcasecmp(s, nand_xfer_types[val])) {
+                               gpmc_nand_data->xfer_type = val;
+                               break;
+                       }
+
        val = of_get_nand_bus_width(child);
        if (val == 16)
                gpmc_nand_data->devsize = NAND_BUSWIDTH_16;