ARM: S3C2442: Merge s3c2442.c and clock.c
authorBen Dooks <ben-linux@fluff.org>
Tue, 26 Jan 2010 07:13:35 +0000 (16:13 +0900)
committerBen Dooks <ben-linux@fluff.org>
Mon, 1 Feb 2010 17:55:26 +0000 (17:55 +0000)
Merge s3c2442.c and clock.c as the s3c242.c does not contain much and
the clock parts are always built for s3c2442 anyway.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
arch/arm/mach-s3c2442/Makefile
arch/arm/mach-s3c2442/clock.c [deleted file]
arch/arm/mach-s3c2442/s3c2442.c

index 2a909c6c579879f76de07decbe2caaf8e0c684e0..7e31ccdc83de3070d8cca43a72ec8e9bc5a8cc31 100644 (file)
@@ -10,7 +10,6 @@ obj-n                         :=
 obj-                           :=
 
 obj-$(CONFIG_CPU_S3C2442)      += s3c2442.o
-obj-$(CONFIG_CPU_S3C2442)      += clock.o
 
 # Machine support
 
diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2442/clock.c
deleted file mode 100644 (file)
index d9b692a..0000000
+++ /dev/null
@@ -1,153 +0,0 @@
-/* linux/arch/arm/mach-s3c2442/clock.c
- *
- * Copyright (c) 2004-2005 Simtec Electronics
- *     http://armlinux.simtec.co.uk/
- *     Ben Dooks <ben@simtec.co.uk>
- *
- * S3C2442 Clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/device.h>
-#include <linux/sysdev.h>
-#include <linux/interrupt.h>
-#include <linux/ioport.h>
-#include <linux/mutex.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <asm/atomic.h>
-#include <asm/irq.h>
-
-#include <mach/regs-clock.h>
-
-#include <plat/clock.h>
-#include <plat/cpu.h>
-
-/* S3C2442 extended clock support */
-
-static unsigned long s3c2442_camif_upll_round(struct clk *clk,
-                                             unsigned long rate)
-{
-       unsigned long parent_rate = clk_get_rate(clk->parent);
-       int div;
-
-       if (rate > parent_rate)
-               return parent_rate;
-
-       div = parent_rate / rate;
-
-       if (div == 3)
-               return parent_rate / 3;
-
-       /* note, we remove the +/- 1 calculations for the divisor */
-
-       div /= 2;
-
-       if (div < 1)
-               div = 1;
-       else if (div > 16)
-               div = 16;
-
-       return parent_rate / (div * 2);
-}
-
-static int s3c2442_camif_upll_setrate(struct clk *clk, unsigned long rate)
-{
-       unsigned long parent_rate = clk_get_rate(clk->parent);
-       unsigned long camdivn =  __raw_readl(S3C2440_CAMDIVN);
-
-       rate = s3c2442_camif_upll_round(clk, rate);
-
-       camdivn &= ~S3C2442_CAMDIVN_CAMCLK_DIV3;
-
-       if (rate == parent_rate) {
-               camdivn &= ~S3C2440_CAMDIVN_CAMCLK_SEL;
-       } else if ((parent_rate / rate) == 3) {
-               camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
-               camdivn |= S3C2442_CAMDIVN_CAMCLK_DIV3;
-       } else {
-               camdivn &= ~S3C2440_CAMDIVN_CAMCLK_MASK;
-               camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
-               camdivn |= (((parent_rate / rate) / 2) - 1);
-       }
-
-       __raw_writel(camdivn, S3C2440_CAMDIVN);
-
-       return 0;
-}
-
-/* Extra S3C2442 clocks */
-
-static struct clk s3c2442_clk_cam = {
-       .name           = "camif",
-       .id             = -1,
-       .enable         = s3c2410_clkcon_enable,
-       .ctrlbit        = S3C2440_CLKCON_CAMERA,
-};
-
-static struct clk s3c2442_clk_cam_upll = {
-       .name           = "camif-upll",
-       .id             = -1,
-       .ops            = &(struct clk_ops) {
-               .set_rate       = s3c2442_camif_upll_setrate,
-               .round_rate     = s3c2442_camif_upll_round,
-       },
-};
-
-static int s3c2442_clk_add(struct sys_device *sysdev)
-{
-       struct clk *clock_upll;
-       struct clk *clock_h;
-       struct clk *clock_p;
-
-       clock_p = clk_get(NULL, "pclk");
-       clock_h = clk_get(NULL, "hclk");
-       clock_upll = clk_get(NULL, "upll");
-
-       if (IS_ERR(clock_p) || IS_ERR(clock_h) || IS_ERR(clock_upll)) {
-               printk(KERN_ERR "S3C2442: Failed to get parent clocks\n");
-               return -EINVAL;
-       }
-
-       s3c2442_clk_cam.parent = clock_h;
-       s3c2442_clk_cam_upll.parent = clock_upll;
-
-       s3c24xx_register_clock(&s3c2442_clk_cam);
-       s3c24xx_register_clock(&s3c2442_clk_cam_upll);
-
-       clk_disable(&s3c2442_clk_cam);
-
-       return 0;
-}
-
-static struct sysdev_driver s3c2442_clk_driver = {
-       .add    = s3c2442_clk_add,
-};
-
-static __init int s3c2442_clk_init(void)
-{
-       return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver);
-}
-
-arch_initcall(s3c2442_clk_init);
index 4663bdc7fff6f26bad2cf161186d805e8a8690c7..188ad1e57dc0321a1f63254f1f1e2a7c04820a17 100644 (file)
 /* linux/arch/arm/mach-s3c2442/s3c2442.c
  *
- * Copyright (c) 2006 Simtec Electronics
- *   Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2004-2005 Simtec Electronics
+ *     http://armlinux.simtec.co.uk/
+ *     Ben Dooks <ben@simtec.co.uk>
  *
- * Samsung S3C2442 Mobile CPU support
+ * S3C2442 core and lock support
  *
  * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
 
+#include <linux/init.h>
+#include <linux/module.h>
 #include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
 #include <linux/list.h>
-#include <linux/timer.h>
-#include <linux/init.h>
-#include <linux/serial_core.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/device.h>
 #include <linux/sysdev.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <linux/mutex.h>
+#include <linux/clk.h>
+#include <linux/io.h>
 
-#include <plat/s3c2442.h>
+#include <mach/hardware.h>
+#include <asm/atomic.h>
+#include <asm/irq.h>
+
+#include <mach/regs-clock.h>
+
+#include <plat/clock.h>
 #include <plat/cpu.h>
 
+/* S3C2442 extended clock support */
+
+static unsigned long s3c2442_camif_upll_round(struct clk *clk,
+                                             unsigned long rate)
+{
+       unsigned long parent_rate = clk_get_rate(clk->parent);
+       int div;
+
+       if (rate > parent_rate)
+               return parent_rate;
+
+       div = parent_rate / rate;
+
+       if (div == 3)
+               return parent_rate / 3;
+
+       /* note, we remove the +/- 1 calculations for the divisor */
+
+       div /= 2;
+
+       if (div < 1)
+               div = 1;
+       else if (div > 16)
+               div = 16;
+
+       return parent_rate / (div * 2);
+}
+
+static int s3c2442_camif_upll_setrate(struct clk *clk, unsigned long rate)
+{
+       unsigned long parent_rate = clk_get_rate(clk->parent);
+       unsigned long camdivn =  __raw_readl(S3C2440_CAMDIVN);
+
+       rate = s3c2442_camif_upll_round(clk, rate);
+
+       camdivn &= ~S3C2442_CAMDIVN_CAMCLK_DIV3;
+
+       if (rate == parent_rate) {
+               camdivn &= ~S3C2440_CAMDIVN_CAMCLK_SEL;
+       } else if ((parent_rate / rate) == 3) {
+               camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
+               camdivn |= S3C2442_CAMDIVN_CAMCLK_DIV3;
+       } else {
+               camdivn &= ~S3C2440_CAMDIVN_CAMCLK_MASK;
+               camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
+               camdivn |= (((parent_rate / rate) / 2) - 1);
+       }
+
+       __raw_writel(camdivn, S3C2440_CAMDIVN);
+
+       return 0;
+}
+
+/* Extra S3C2442 clocks */
+
+static struct clk s3c2442_clk_cam = {
+       .name           = "camif",
+       .id             = -1,
+       .enable         = s3c2410_clkcon_enable,
+       .ctrlbit        = S3C2440_CLKCON_CAMERA,
+};
+
+static struct clk s3c2442_clk_cam_upll = {
+       .name           = "camif-upll",
+       .id             = -1,
+       .ops            = &(struct clk_ops) {
+               .set_rate       = s3c2442_camif_upll_setrate,
+               .round_rate     = s3c2442_camif_upll_round,
+       },
+};
+
+static int s3c2442_clk_add(struct sys_device *sysdev)
+{
+       struct clk *clock_upll;
+       struct clk *clock_h;
+       struct clk *clock_p;
+
+       clock_p = clk_get(NULL, "pclk");
+       clock_h = clk_get(NULL, "hclk");
+       clock_upll = clk_get(NULL, "upll");
+
+       if (IS_ERR(clock_p) || IS_ERR(clock_h) || IS_ERR(clock_upll)) {
+               printk(KERN_ERR "S3C2442: Failed to get parent clocks\n");
+               return -EINVAL;
+       }
+
+       s3c2442_clk_cam.parent = clock_h;
+       s3c2442_clk_cam_upll.parent = clock_upll;
+
+       s3c24xx_register_clock(&s3c2442_clk_cam);
+       s3c24xx_register_clock(&s3c2442_clk_cam_upll);
+
+       clk_disable(&s3c2442_clk_cam);
+
+       return 0;
+}
+
+static struct sysdev_driver s3c2442_clk_driver = {
+       .add    = s3c2442_clk_add,
+};
+
+static __init int s3c2442_clk_init(void)
+{
+       return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver);
+}
+
+arch_initcall(s3c2442_clk_init);
+
+
 static struct sys_device s3c2442_sysdev = {
        .cls            = &s3c2442_sysclass,
 };