pinctrl: msm: Correct interrupt code for TLMM v2
authorBjorn Andersson <bjorn.andersson@sonymobile.com>
Mon, 31 Mar 2014 21:49:54 +0000 (14:49 -0700)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 14 Apr 2014 07:39:33 +0000 (09:39 +0200)
Acking interrupts are done differently between on v2 and v3, so add an extra
attribute to the pingroup struct to let the platform definitions control this.
Also make sure to start dual edge detection by detecting the rising edge.

Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/pinctrl-msm.c
drivers/pinctrl/pinctrl-msm.h

index 38d579b47f312763fc8986a4be4e911abc95178e..e43fbce56598a65bd10dcbcafc56709ea7f746a1 100644 (file)
@@ -665,7 +665,10 @@ static void msm_gpio_irq_ack(struct irq_data *d)
        spin_lock_irqsave(&pctrl->lock, flags);
 
        val = readl(pctrl->regs + g->intr_status_reg);
-       val &= ~BIT(g->intr_status_bit);
+       if (g->intr_ack_high)
+               val |= BIT(g->intr_status_bit);
+       else
+               val &= ~BIT(g->intr_status_bit);
        writel(val, pctrl->regs + g->intr_status_reg);
 
        if (test_bit(d->hwirq, pctrl->dual_edge_irqs))
@@ -744,6 +747,7 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type)
                        break;
                case IRQ_TYPE_EDGE_BOTH:
                        val |= BIT(g->intr_detection_bit);
+                       val |= BIT(g->intr_polarity_bit);
                        break;
                case IRQ_TYPE_LEVEL_LOW:
                        break;
index 8fbe9fb19f36e993e34d712c02a47a530a3b915b..6e26f1b676d75f9de3d90bcb3c1f48b1bda7d095 100644 (file)
@@ -84,6 +84,7 @@ struct msm_pingroup {
 
        unsigned intr_enable_bit:5;
        unsigned intr_status_bit:5;
+       unsigned intr_ack_high:1;
 
        unsigned intr_target_bit:5;
        unsigned intr_raw_status_bit:5;