cxl: Enable bus mastering for devices using CAPP DMA mode
authorIan Munsie <imunsie@au1.ibm.com>
Wed, 13 Jul 2016 21:17:02 +0000 (07:17 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Thu, 14 Jul 2016 10:26:35 +0000 (20:26 +1000)
Devices that use CAPP DMA mode (such as the Mellanox CX4) require bus
master to be enabled in order for the CAPI traffic to flow. This should
be harmless to enable for other cxl devices, so unconditionally enable
it in the adapter init flow.

Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
drivers/misc/cxl/pci.c

index 6ac6b05f41a4503171b178077e02622ef054a23f..deef9c75e73af9d78723e0acf1960a7b4b94eaaf 100644 (file)
@@ -1264,6 +1264,9 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev)
        if ((rc = adapter->native->sl_ops->adapter_regs_init(adapter, dev)))
                goto err;
 
+       /* Required for devices using CAPP DMA mode, harmless for others */
+       pci_set_master(dev);
+
        if ((rc = pnv_phb_to_cxl_mode(dev, adapter->native->sl_ops->capi_mode)))
                goto err;