spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate
authorAmelie Delaunay <amelie.delaunay@st.com>
Mon, 10 Aug 2020 07:12:36 +0000 (09:12 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 3 Sep 2020 09:22:29 +0000 (11:22 +0200)
[ Upstream commit 9cc61973bf9385b19ff5dda4a2a7e265fcba85e4 ]

Fix spi->clk_rate when it is odd to the nearest lowest even value because
minimum SPI divider is 2.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alain Volmat <alain.volmat@st.com>
Link: https://lore.kernel.org/r/1597043558-29668-4-git-send-email-alain.volmat@st.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/spi/spi-stm32.c

index ba9743fa2326d11689384e47c84da4068c9fc521..179749f354c339833717a450be1b967a6db4f7cb 100644 (file)
@@ -254,7 +254,8 @@ static int stm32_spi_prepare_mbr(struct stm32_spi *spi, u32 speed_hz)
 {
        u32 div, mbrdiv;
 
-       div = DIV_ROUND_UP(spi->clk_rate, speed_hz);
+       /* Ensure spi->clk_rate is even */
+       div = DIV_ROUND_UP(spi->clk_rate & ~0x1, speed_hz);
 
        /*
         * SPI framework set xfer->speed_hz to master->max_speed_hz if